Experienced Design Verification Engineer with over 13 years of expertise in verifying diverse IPs, SoCs, and VIP development using SystemVerilog (SV), UVM, and C. Proven track record in the full verification flow, from meticulous planning and robust testbench development to comprehensive coverage closure.
Hi, I’m
Abdul Rehman
Bangalore
Summary
Overview
14
years of professional experience
Work History
Lyptus Technologies Pvt Ltd.
Data Fabric Verification
2024.02 - Current (2 education.years_Label & 8 education.months_Label)
Job overview
- Verifying feature updates of IOMS module.
- Debugging Fails, fixing TB and filing Bugs
- AMD | July'25 - Ongoing
Lyptus Technologies Pvt Ltd.
Non-Coherent AMBA NoC Verification
2024.02 - 2025.07 (1 education.year_Label & 5 education.months_Label)
Job overview
- Developed a scalable Scoreboard for end-to-end checking; Contributed to sequence/test bring-up and NoC features verification.
- Mentored junior engineers.
- Baya Systems | Feb`24 – July'25
Waferspace Semiconductor Pvt Ltd.
ICD IP Verification
2015.01 - 2024.01 (9 education.years_Label)
Job overview
- Developed Test Plan and complete UVM testbench, including all TB components, constrained-random stimuli, coverage models, and scoreboard.
- Performed thorough debugging, code coverage analysis, and functional coverage closure.
- Google | May21-Dec23
Waferspace Semiconductor Pvt Ltd.
PCIe Gen5 IP Verification
2019.08 - 2021.02 (1 education.year_Label & 6 education.months_Label)
Job overview
- Achieved functional coverage for SR-IOV features and chapter 6 features.
- Executed DemoTB debugging and facilitated IP delivery for PCIe Gen4 for a customer.
- Cadence | Aug`19-Feb'21
Waferspace Semiconductor Pvt Ltd.
Flash SubSystem Verification at SoC
2017.11 - 2019.07 (1 education.year_Label & 8 education.months_Label)
Job overview
- Developed test plans and verified various feature modes, transfer speeds, XiP mode, and DMA transfers.
- Conducted clock, reset, interrupt, toggle coverage, and connectivity tests.
- TI | Nov17-Jul19
Waferspace Semiconductor Pvt Ltd.
PLL and PLL Controller Verification at SoC
2017.04 - 2017.10 (6 education.months_Label)
Job overview
- Developed test plans and tests covering various PLL features, frequencies, events, reset-related scenarios, connectivity, and toggle coverage.
- TI | Apr17-Oct17
Waferspace Semiconductor Pvt Ltd.
SD/eMMC Host Controller Subsystem Verification
2016.07 - 2017.03 (8 education.months_Label)
Job overview
- Developed Verification and Test plans, alongside the TB and tests for all SD/eMMC read-write operations.
- Performed debugging, code coverage analysis, and functional coverage closure.
- TI | Jul16-Mar17
Waferspace Semiconductor Pvt Ltd.
Hardware-accelerator Thread Scheduler IP Verification
2016.02 - 2016.06 (4 education.months_Label)
Job overview
- Developed Spare Scheduler UVC; authored, debugged testcases, and achieved code coverage closure.
- TI | Feb16-Jun16
Waferspace Semiconductor Pvt Ltd.
Network Router SoC Verification
2015.03 - 2015.10 (7 education.months_Label)
Job overview
- Testmode verification, debug; Ported testcases for the SDIO block
- Broadcom | Mar15-Oct15
Whizchip Design Technologies Pvt Ltd.
SD Card VIP Development
2011.10 - 2015.01 (3 education.years_Label & 3 education.months_Label)
Job overview
- Contributed to Verification and Test plans; Contributed to SD host agent, scoreboard, and testcases development.
- Debugging and achieved functional coverage closure.
- Synopsys | Jan14-Dec14
Whizchip Design Technologies Pvt Ltd.
AHB Master VIP Development
2012.02 - 2012.07 (5 education.months_Label)
Job overview
- Developed test plans, testbench, tests, and sequences, achieving functional coverage.
- Internal | Feb12-Jul12
Education
Vemana Institute of TechnologyBengaluru
Bachelors from Electronics & Communication Engineering
University Overview
RV-VLSI Design CenterBengaluru
PG Diploma from ASIC Design
University Overview
Skills
- Protocols: AMBA, Octal-SPI and Hyperbus, SD/eMMC Card, PCIe
- Languages: SystemVerilog, Assertions, Verilog, C, python
- Methodologies: UVM, RAL
- Expertise: Verification Planning, Functional Coverage Planning and Execution, Testbench Development, Constrained-Random Stimuli, Assertions, Debugging, Cross-functional Team Collaboration
Timeline
Data Fabric Verification
Lyptus Technologies Pvt Ltd.
2024.02 - Current (2 education.years_Label & 8 education.months_Label)
Non-Coherent AMBA NoC Verification
Lyptus Technologies Pvt Ltd.
2024.02 - 2025.07 (1 education.year_Label & 5 education.months_Label)
PCIe Gen5 IP Verification
Waferspace Semiconductor Pvt Ltd.
2019.08 - 2021.02 (1 education.year_Label & 6 education.months_Label)
Flash SubSystem Verification at SoC
Waferspace Semiconductor Pvt Ltd.
2017.11 - 2019.07 (1 education.year_Label & 8 education.months_Label)
PLL and PLL Controller Verification at SoC
Waferspace Semiconductor Pvt Ltd.
2017.04 - 2017.10 (6 education.months_Label)
SD/eMMC Host Controller Subsystem Verification
Waferspace Semiconductor Pvt Ltd.
2016.07 - 2017.03 (8 education.months_Label)
Hardware-accelerator Thread Scheduler IP Verification
Waferspace Semiconductor Pvt Ltd.
2016.02 - 2016.06 (4 education.months_Label)
Network Router SoC Verification
Waferspace Semiconductor Pvt Ltd.
2015.03 - 2015.10 (7 education.months_Label)
ICD IP Verification
Waferspace Semiconductor Pvt Ltd.
2015.01 - 2024.01 (9 education.years_Label)
AHB Master VIP Development
Whizchip Design Technologies Pvt Ltd.
2012.02 - 2012.07 (5 education.months_Label)
SD Card VIP Development
Whizchip Design Technologies Pvt Ltd.
2011.10 - 2015.01 (3 education.years_Label & 3 education.months_Label)
Vemana Institute of Technology
Bachelors from Electronics & Communication Engineering
RV-VLSI Design Center
PG Diploma from ASIC Design