Summary
Work History
Education
Accomplishments
Timeline
Affiliations
Overview
Projects
Areas Of Interest
Languages
Projects
Areas Of Interest
Languages
Generic

ADARSH VENUGOPAL

Mumbai

Summary

Electronics engineering student with strong foundations in RTL design, FPGA prototyping, and high-level synthesis. Proficient in Verilog/VHDL, Vivado, Vitis AI, and Zynq-based hardware. Demonstrated skills in hardware-software co-design for embedded systems and deep learning acceleration.

Work History

Intern | Information Systems

NTT Global Data Centers and Cloud Infrastructure India
Mumbai
05.2025 - 06.2025
  • Deployed Meta’s Llama LLM model on AWS EC2 instances; created and deployed inference APIs using SageMaker service.
  • Upgraded legacy network infrastructure by replacing EOL switches, and integrated with Juniper’s MIST Cloud.

Student Intern | Dept of Technology Risk

Ernst & Young
Mumbai
05.2025 - 05.2025
  • Supported ISO/GDPR-aligned security audits;risk frameworks relevant to secure development.
  • Gained practical exposure to auditing processes and security control assessments in a corporate environment.

Embedded Systems Project Assistant

SATCARD, IIT-PKD
Palakkad
07.2024 - 08.2024
  • Designed and implemented a vibration analysis system using accelerometers and microcontrollers.
  • Applied sensor fusion techniques and integrated smart agricultural technologies to optimize field operations and system performance.

Education

Bachelor of Technology - Electronics And Communication Engineering

Amrita Vishwa Vidyapeetham
Coimbatore
05-2026

Accomplishments

  • Tools: Vivado, Vitis, ModelSim, Keil, Silabs Studio, AWS
  • Languages: Verilog,SystemVerilog, VHDL,Python, MATLAB, C, C++(learning), CUDA (learning)
  • Domains: FPGA Prototyping, RTL Design & Verification, SoC Design ,Hardware Acceleration, DSP, AI & ML, Cloud hosting

Timeline

Intern | Information Systems

NTT Global Data Centers and Cloud Infrastructure India
05.2025 - 06.2025

Student Intern | Dept of Technology Risk

Ernst & Young
05.2025 - 05.2025

Embedded Systems Project Assistant

SATCARD, IIT-PKD
07.2024 - 08.2024

Bachelor of Technology - Electronics And Communication Engineering

Amrita Vishwa Vidyapeetham

Affiliations

  • Student Leader & Runner-Up, AS I EVOLVE – Rotary Club of Coimbatore: Campus-nominated coordinator for a holistic mentoring and development program.
  • Member, INCOSE – Amrita Chapter: Active contributor to the International Council on Systems Engineering student chapter.
  • Volunteer, Social Outreach Events: Helped organize and serve food at large-scale community events, including Amma’s 70th birthday and Coimbatore visit.

Overview

1
1
year of professional experience

Projects

  • FPGA Deep Learning Accelerator: Deployed ResNet-18 on Xilinx Zynq UltraScale+ using Vitis AI 3.0 for real-time image inference with hardware acceleration.
  • Gunshot Detection System (Ongoing): Designing an FPGA-accelerated solution for gunshot localization using DoA estimation, TDOA, and deep learning.
  • Voice Authentication System: Developed a machine learning and DSP-based voice authenticator to enable hands-free access for the visually impaired.
  • Fooling a Neural Network: Generated adversarial image perturbations to deceive CNNs, achieving targeted misclassification via converging optimization algorithms.
  • Mini Projects: 27 MHz Citizen Band Walkie Talkie along with other small-scale projects in ML-DL, Digital Design, and TTL logic circuits.

Areas Of Interest

  • Electronic System Design & Verification
  • Embedded & DSP Systems
  • Computer Networks
  • ML for Embedded Applications & Cross-Domain R&D

Languages

English and Hindi (Proficient), Tamil (Fluent in speech), Marathi (Basic comprehension and limited speech)

Projects

  • FPGA Deep Learning Accelerator: Deployed ResNet-18 using Vitis AI on Zynq UltraScale+ for real-time inference.
  • Gunshot Detection System (Ongoing): Designing an FPGA-accelerated solution for gunshot localization using DoA estimation, TDOA, and deep learning via HLS, IP Design, and IP Integration.
  • Voice Authentication System: Microcontroller-based voice access control for thevisually impaired using feature extraction and ML.
  • Fooling a Neural Network: Exploited CNN vulnerabilities by generating low-magnitude adversarial perturbations using convergence-based optimization strategies.
  • Mini Projects: 27 MHz CB systems, mini ML models, and TTL/digital logic projects.

Areas Of Interest

  • RTL Design, IP Core Development, and High-Level Synthesis
  • FPGA Prototyping and Acceleration
  • ML for Embedded Applications & Cross-Domain R&D

Languages

English and Hindi (Proficient), Tamil (Fluent in speech), Marathi (Basic comprehension and limited speech)

ADARSH VENUGOPAL