Summary
Overview
Work History
Education
Personal Infirmation
Timeline
Generic

Aditya Mahajan

Principal Engineer
BENGALURU

Summary

I have Master's Degree from Thapar University Punjab, currently working at Western Digital for more than 5 years with a group of re-imaginer's leading the Enterprise SSD movement. Here I get to play with NVMe, PCIe, ZNS, Multiple controllers, Compliance and other storage technologies. My role as tech lead includes designing, deploying, Debugging and testing of SSD FW on enterprise level products.


At Samsung R&D, worked for 2.5 years on designing, deploying SSD FW. Also helped design and develop applications to aid Testing of Unit of SSD written in C++/C. Worked on developing a tool to do unit level testing of HW modules

Overview

9
9
years of professional experience
8
8
years of post-secondary education

Work History

Principal Engineer

Western Digital
07.2022 - Current

PCIe Gen 4 Products with NVMe 1.4 and OCP

  • As tech lead developed FW support for in house NVMe/PCIe IP features like Reset Flow commands handling, abort handling.
  • Proposed and implemented Time to ready, Namespace type and many other features handling of OCP.
  • Responsible for working with the platform, SOC, Firmware, Software, Validation for driving requirements, alignment across functional teams and working through technology intercepts.
  • Managed to implement some of the feature form spec 2.0 of NVMe.
  • Completed the compliance cycle of UNH and PCI-SIG.
  • Implemented VUC command based on customer requirements
  • Reviewed plans, documents and related materials to assess projected actions and advise on changes.
  • Collaborated with fellow engineers to evaluate software and hardware interfaces.

Staff Engineer

Western Digital
01.2020 - 06.2022

PCIe Gen 4 Products with ZNS

  • Responsible for getting compliance to world first zone SSD compliance.
  • Design and development of core Software stack and platform features related to Zone namespace.
    Proposed and implemented AER handling for ZNS IP. Worked on zone commands and error handling.
  • Enabled the dual port, reservation and multipath IO.
  • Conducted research to test and analyze feasibility, design, operation and performance of equipment, components, and systems.
  • Participated in formal internal design reviews of proposed products and components.
  • Used strong analytical and problem-solving skills to develop effective solutions for challenging situations.

Senior Engineer

Western Digital
03.2017 - 12.2019

PCIe Gen3 Product with NVMe 1.4

  • Worked on third party controller single and dual port environment.
  • Owned key role for design and development of features like PCIe & NVMe Reset Flow, Vendor Unique commands handling
    and defect management.
  • Played the customer interface FW lead in PDT from India site.
  • Defined engineering problems, collected data, established facts and drew conclusions to solve project issues.

Senior Software Engineer

Samsung Research India
03.2016 - 06.2017

PCIe Gen3 Product with NVMe 1.3

  • Worked on unit FW team for in house multi core NVMe IP controller.
  • Worked on many features for enabling and testing the HW functionality.
  • Proposed and implemented Fused handling,Command id conflict and reset with SRIOV.
  • Defect resolution, analysis, debugging was the main responsibilities of this role .
  • Reviewed project specifications and designed technology solutions that met or exceeded performance expectations.
  • Provided guidance and mentored less-experienced staff members.

Software Engineer

Samsung Research India
06.2014 - 02.2016

Test tool for Unit level HW Validation

  • UART based communication tool used to send and receive test package in and out of FW.
  • This tool was designed to do IP based validation. Played key role in initial design and implementation of the tool libraries.
  • Developed scripts to validate various scenarios for key
    modules in IP .
  • Identified issues, analyzed information and provided solutions to problems.
  • Worked well in a team setting, providing support and guidance.

Student Intern

Samsung Research India, R
12.2013 - 06.2014

Test Automation framework

  • Designed framework that can reduce the manual effort remarkably by carrying out tests simultaneously on all the selected configurations which have SSD host applications on windows environment Proposed and implemented Client server architecture to handle large number of clients .
  • Proposed and implemented health monitor & Alive check module . Owned key module which detects client PC automatically and schedule test.
  • Developed module for Auto client installation and updation .
  • Gained operational knowledge and supported departmental needs.
  • Analyzed problems and worked with teams to develop solutions.

Education

M.C.A - Computer Application

Thapar University
Patiala,Punjab
06.2011 - 06.2014

B.C.A - Computer Application

Panjab University, Arya College
Ludhiana,Punjab
05.2008 - 03.2011

+2 - Commerce

New Sr Sec School
Ludhiana,Punjab
04.2007 - 03.2008

10th -

New Sr Sec School
Ludhiana,Punjab
04.2005 - 03.2006

Personal Infirmation

Father's Name: Rakesh Mahajan 

Languages: English, Hindi, Punjabi 

Address: B8 Vintage Square , Hagaduru main road, Whitfield ,Bangalore,
Karnataka-560066
 

Timeline

Principal Engineer

Western Digital
07.2022 - Current

Staff Engineer

Western Digital
01.2020 - 06.2022

Senior Engineer

Western Digital
03.2017 - 12.2019

Senior Software Engineer

Samsung Research India
03.2016 - 06.2017

Software Engineer

Samsung Research India
06.2014 - 02.2016

Student Intern

Samsung Research India, R
12.2013 - 06.2014

M.C.A - Computer Application

Thapar University
06.2011 - 06.2014

B.C.A - Computer Application

Panjab University, Arya College
05.2008 - 03.2011

+2 - Commerce

New Sr Sec School
04.2007 - 03.2008

10th -

New Sr Sec School
04.2005 - 03.2006
Aditya MahajanPrincipal Engineer