Amit Chopra
Bengaluru
Summary
Engineering professional prepared for high-impact roles with extensive experience in leading cross-functional teams and managing large-scale projects. Known for strong focus on collaboration and achieving results, adapting seamlessly to changing project needs. Possesses technical acumen and strategic planning skills that drive engineering excellence and innovation.
Experienced with designing and implementing advanced engineering solutions. Utilizes technical proficiency and strategic oversight to ensure project success and system reliability. Track record of fostering collaborative environments and delivering innovative solutions on time and within scope.
Overview
13
13
years of professional experience
Work History
Principal Engineer, Firmware Engineering
Western Digital
12.2017 - Current
- Delivered 2 new Portable SSD / 1 USB Dual Drive / 1 SATA SSD during my tenure here as a technical team lead
- We write parallel Firmware and use cases to do White Box Validation of Storage Firmware
- Possess full understanding of Storage Firmware for USB and SATA devices
- Further I specialize in Firmware Power management for SoC
- Team management: Managing and leading a team of 12 software engineers to deliver high-quality software products on time and within budget
- Project management: Overseeing the planning, execution, and delivery of software projects
- Hiring and training: Recruiting and hiring new team members, as well as training and mentoring existing team members
- Risk management: Identifying potential risks and developing contingency plans to mitigate them
Senior Firmware Engineer
Intel (CWF) Global Edge Pvt Ltd
05.2015 - 11.2017
- Power Drivers / System Debugging (Intel’s)
- Platform: threadX intels proprietary OS
- Languages and Tools: C / trace32, JTAG, Oscilloscope, source insight, GIT / opticm6
- Chip sets: XMM7480 / XMM7560
- Responsibilities: As a developer I own couple of power sub drivers like Sleep driver, and power resource management drivers
- My major responsibilities include participation in chip software design planning, execution of plan, implementation, pre silicon validation of code, planning test code, implementation of test suites, sign off code post validation, and integrate to mainline
- And retest when hardware actually arrives
- Secondary is optimization and bug fixing, issues are reported from internal testers and from end customers which needs to addressed in given time span and deliver it back to customer
- Sleep Driver: system idle driver calculates idleness of core / cores and initiate sleep mode, while entering sleep need to shut down all Sub systems and store their current state so it could be restored at wake up
- Power Resource management: Every SOC needs an interface, with the help of which it can talk to firmware which actually controls various SOC resources like clock’s / voltage rails / gates etc, it’s a centralized resource management framework which provides API to all Subsystems to request physical resource access and controls initial state of resources at bootup
Firmware Engineer
Qualcomm India (CWF) Votary Tech Pvt Ltd
01.2014 - 04.2015
- Node Power Architecture
- Platform: Qurt / Blast Qualcomm proprietary OS
- Languages and Tools: C / trace32, jtag, crashscope, source insight, perforce, virtio
- Clients: Samsung / Sony / LGE / many more tier 1 companies
- Chip sets: MSM8974 / MSM9x15 / APQ8084 / MSM8916 / MSM8939 / MSM8909 / MSM8952
- Responsibility: As an owner of this module, I am responsible for making necessary changes as per new chipset requirement from older in new chipset bring up and pre-silicon validation of those changes using virtio
- Rectifying issues at time bring up and making sure it’s running fine as expected
- Along with this I am responsible for making changes as per client’s requirements and debugging issues reported by clients in minimum time period
- Besides this I am providing debugging support for other power module as well like sleep subsystem, i.e
- Idle power management and logging mechanism
- NPA description: NPA is resource management framework
- As need arises it was getting difficult to manage and maintain resources in individual Subsystems like MODEM / WCNSS / RPM / TZ / APPS
- NPA was developed with intention to take care of resources in one module and clients can request for resource to NPA and NPA will process request for changing resource state / getting event notification and querying resource state, notify clients through call back once request is complete
- Benefits are many like parallelism and avoiding race conditions many more
Embedded Engineer
Microware Technologies
08.2011 - 11.2012
- Accelerometer and temp Sensor interface through ADC (PCF8591) driver for S3C2440 / OMAP4460:
- Platform: linux-3.2/Android 4.1.1
- Languages and Tools: C, make, ctags, buildroot
- Description: - Accelerometers are sensitive to tilt, gravitational field which allows smart phone or tablet to automatically switch between portrait and landscape mode
- This output (Three axis analog output) is given to PCF8591(Analog to Digital converter which include analog input multiplexing, on chip track ,8bit analog to digital conversion
- This driver (PCF8951) falls under sysfs type of registration which is most popular for hot plug subsystems and to export the kernel data structures to the user space
- Understanding working of PCF8591 ADC/DAC chip
- Made necessary changes in Uboot source code and kernel source code
- Added platform structure to Board file at kernel source code
- Understood sysfs registration issues
- Capturing the initial requirements, tuning parameters for better mode rotation
- Fixing bugs in the total Sensor subsystem till the model commercialize
Education
Bachelor of Electronics Engineering -
Nagpur University
05.2011
Diploma in Electronics and Comm Engg -
MSBTE
Embedded Engineering -
Vector Institute
02.2012
Skills
- Time Management
- Leadership Skills / Project team leadership
- Product roadmapping / Project management
- C & Data Structures / Python / Assembly
- Kernel Architecture and Internals
- Threads / Signals / IPC
- Synopsys JTAG / Trace32 / Oscilloscopes / Logic Analyzers
- I2C / SPI
- USB / SATA
- SOC Power Management
Accomplishments
- Secured 3 patent filings in 2 years, with 2 more under review.
- Independently Led a 12-member team to deliver SanDisk's first Apple MFI pSSD, now retailing in Apple Stores.
- Successfully managed the development of SanDisk Extreme Pro Dual USB High-Speed Drive.
Languages
English
Hindi
Hobbies and Interests
- Driving
- Reading
- Exploring about technology
Personal Information
Title: Principal Engineer, Firmware Engineering
Timeline
Principal Engineer, Firmware Engineering
Western Digital
12.2017 - Current
Senior Firmware Engineer
Intel (CWF) Global Edge Pvt Ltd
05.2015 - 11.2017
Firmware Engineer
Qualcomm India (CWF) Votary Tech Pvt Ltd
01.2014 - 04.2015
Embedded Engineer
Microware Technologies
08.2011 - 11.2012
Embedded Engineering -
Vector Institute
Bachelor of Electronics Engineering -
Nagpur University
Diploma in Electronics and Comm Engg -
MSBTE
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