
Engineer with 3+ years of experience in power electronics hardware design, inverter systems, analog circuit design, hardware validation, and reliability engineering for aerospace applications. Experienced in board bring-up, schematic review, DFMEA, EMI/EMC fundamentals, and qualification testing, with hands-on experience in 4.2 kW inverter system.
Patent Filed
Automatic Watchdog Suppression for MCU Programming Using JTAG_TRST-Driven FPGA Masking Logic
• Developed a hardware-assisted watchdog suppression methodology enabling reliable MCU programming while preventing unintended watchdog-triggered resets.
• Utilizes FPGA masking logic driven by JTAG_TRST signals to automatically manage watchdog behavior during programming operations.
• Improves programming reliability, reduces manual intervention, and enhances system robustness in embedded aerospace electronics.