ANU JOSEY
Post Silicon Validation Engineer
Bengaluru,KA
Summary
Experienced Post-Silicon Validation Engineer with 3+ years of experience in V93K platform and 7 years’ experience in PCBA validation. Expertise in developing and automating test content. Strong problem solving, communication and leadership skills. Proven track record in developing test setups to analyze and validate IC’s and PCBA’s.
Overview
11
11
years of professional experience
2
2
Languages
Work History
Sr. Post Silicon Validation Engineer
Tessolve Semiconductor Pvt. Ltd.
10.2021 - Current
Project 1: Power Management IC
- Responsibilities:
- Debug of various functionality modules including regulator modules.
- Development of Configuration File, basic level set.
- TTR, Yield Management, shipment activities for customer TP release.
Project 2: ABS control IC
- Responsibilities:
- Feasibility study and Resource allocation as per the customer requirements
- Load board design activities including draft schematic designing and verification, PCB layout verification, net list verification and BOM verification.
- Working with quality team for various stages of Hardware quality check
- Offline test program development and online validation of test programs.
- TTR, Yield Management, stability check and quality checks
Project 3: Thermoelectric Controller
- Responsibilities:
- Test program development and validation of various modules.
- Implementation of Basic checks, Trimming modules and Functional check modules.
Test Engineer
SFO Technologies Pvt. Ltd.
05.2014 - 09.2021
- Role: Test development Engineer
- Responsibilities:
- Test plan development
- ATE and manual test system development
- Schematic and PCB designing
Education
B Tech WILP -
Birla Institute of Technology & Science
Pilani, India01.2029
Diploma - Electronics Engineering
Board of Technical Education, Govt Polytechnic College
Ernakulam, India01.2016
Skills
KiCad
undefinedExperience Summary
- Experience in developing Test Programs and Debug on ATE – Advantest 93K platform.
- Good hands-on experience with Advantest SMT7 platform.
- Able to review designer data sheets and develop a test plans & solution.
- Working with various Analog and Mixed signal DUT solutions with V93K platform (With exposure in the instruments like AVI64, FV116, PS 1600 etc.)
- Experience in RDI best practises and Coverage checks for test program.
- Work in multi-site test program development, debug to BIN1 across tri temp and test enhancement activities
- Knowledge and experience on data analysis tools like Advantest MVA & TP360.
- Familiar with SPI and I2C protocols.
Disclaimer
I hereby solemnly affirm that all details furnished above are true to the best of my knowledge.
Anu Josey
Timeline
Sr. Post Silicon Validation Engineer
Tessolve Semiconductor Pvt. Ltd.
10.2021 - Current
Test Engineer
SFO Technologies Pvt. Ltd.
05.2014 - 09.2021
B Tech WILP -
Birla Institute of Technology & Science
Diploma - Electronics Engineering
Board of Technical Education, Govt Polytechnic College
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