Results-driven Silicon Design Engineer with expertise in low-power verification for complex SoCs, using C++, SV, and UVM-based environments. Involved in SoC-level verification of complex SoCs that are embedded into the client profile's mainstream APUs. Known for strong problem-solving skills, attention to detail, and effective collaboration across teams, contributing to successful project outcomes.
Project 1: STX Halo
Project 2: Medusa 1
Project 3: Medusa DT