Summary
Overview
Work History
Education
Skills
Timeline
Generic

Aryan Teotia

Ghaziabad

Summary

Results-driven engineer with hands-on experience at Cadence, proficient in Verilog and SystemVerilog. Successfully developed and validated innovative digital designs, enhancing quality assurance processes. Demonstrated strong analytical skills and effective project management using JIRA and Jenkins, contributing to improved regression testing and customer satisfaction.

Overview

2
2
years of professional experience

Work History

Intern Product Validation Engineer

Cadence
Noida
06.2024 - Current
  • Acquired proficiency in Verilog, SystemVerilog, and Linux commands.
  • Compiled and analyzed software regression test cases for hardware across various Xcelium versions.
  • Conducted analysis for software release activities to ensure quality assurance.
  • Executed compile time and runtime operations using both ixcom_flow and ice_flow.
  • Developed multiple features related to LRM and tool flow requirements.
  • Utilized Jenkins to initiate main and customized regression processes.
  • Gained experience with Perforce area/client management and JIRA software for project tracking.
  • Contributed to customer test cases by converting them into regression tests.
  • Knowledge of bash/shell scripting.

Intern Design and Verification

Pine training academy
Noida
06.2023 - 06.2024

1. Implementation of Digital clock on Seven

Segment Display on FPGA

Design and implement a digital clock using Verilog on an FPGA to demonstrate

hands-on learning in digital design and Verilog programming for real-time

applications.

Description:Utilize Verilog programming to create a digital clock on an FPGA,

displaying the time on a Seven Segment Display (SSD). The clock will showcase

the ones and tens digits of seconds, followed by minutes, hours on separate

SSDs.

2. Implementation of Color changing VGA

Display on FPGA

Objective: Create and execute a project to develop a color-changing VGA display

on an FPGA board. The goal is to offer an interactive learning experience in digital

design, FPGA programming, and graphical output.

Description: Make a colorful VGA screen using FPGA programming that reacts to

switches. When you flip switches, the screen changes colors because the FPGA

board understands and responds to your actions.

3. Implementation of Traffic Signal Controller

Objective: To efficiently manage and regulate the flow of traffic at an intersection

by implementing a responsive and synchronized signal sequencing mechanism.

Description: - To make traffic lights work together at intersections, helping cars

move smoothly and safely by controlling when each light turns red, yellow, or

green

Education

B.tech - Electronics And Communication Engineering

JSS Academy of Technical University
Noida
06-2024

Skills

  • Verilog and SystemVerilog
  • Digital design
  • Linux command line
  • Quality assurance

Timeline

Intern Product Validation Engineer

Cadence
06.2024 - Current

Intern Design and Verification

Pine training academy
06.2023 - 06.2024

B.tech - Electronics And Communication Engineering

JSS Academy of Technical University
Aryan Teotia