Summary
Overview
Work History
Education
Skills
Accomplishments
Timeline
Generic
Asina P K

Asina P K

Silicon Architect (Verification)
Bengaluru

Summary

Skilled Pre-Silicon Verification Engineer with 15.5+ years of robust background in verification domain, delivering innovative solutions to complex technical challenges. Expertise in designing scalable and secure architectures that align with business objectives. Demonstrated strong analytical skills and collaborative approach to drive successful project outcomes.

Overview

15
15
years of professional experience

Work History

Silicon Domain Architect

Intel Technologies PVT LTD
Bengaluru
04.2021 - Current
  • Designed comprehensive documentation for all aspects of power architecture validation of PM algorithms, facilitating transparency by creating high quality high level verification plan.
  • Collaborated with cross-functional teams for validating high-quality Power management protocols on time.
  • Designed Validation Architecture and Environment for cross feature, Verification plan reviews and cross die validation of cluster level and system level scenarios
  • Github based coding, code review of entire validation team as a code owner for multiple features
  • Expert in Kanban Board and JIRA based work allocation to the team members, tracking the same against milestones and ensuring the quality of deliverables in stipulated time
  • Developed innovative architectural validation strategies for enhancing the verification capabilities and processes.
  • Spearheaded the integration of new technologies into existing infrastructures, elevating overall system capabilities.

Senior Verification Lead Engineer

Qualcomm Technologies PVT LTD
Bengaluru
09.2018 - 04.2021
  • Worked in Bluetooth subsystem DV team for multiple projects and verified the Packet processor standards HADM and IEEE15p4 using SV UVM methodology.
  • Handled the end to end verification of multiple IPS in Bluetooth subsystem like Central and Global Timers, FW logger, DTOP, Radio Select and Radio Control Unit.
  • Developed from scratch Constraint based random verification environment and tesplans for multiple IPs.
  • Led a team of engineers to deliver high-quality products on time and within time constraints.

Senior Verification Engineer

ARM Embedded Technologies PVT LTD
Bengaluru
07.2015 - 09.2018
  • Integration and Validation of the infrastructure and Mobile system IPs with Hetero or homogeneous cores in the same cluster with other IPs using SIF flow.
  • Ensured system stability across various simulation platforms, including Questasim, IES, and VCS, as well as emulation tools such as Z1, Zebu, and Veloce
  • Validated the SoC level scenarios for ensuring the integration correctness of the system
  • Drove continuous improvement initiatives within the team by staying updated on industry trends and incorporating new techniques wherever applicable.

Senior Verification Engineer

Wipro Technologies
Cochin
12.2009 - 07.2015
  • Participated in design specification and created the high quality tesplan, providing valuable inputs that helped shape the final product requirements.
  • Streamlined workflow with the creation of reusable testbenches and simulation environments.
  • Developed custom scripts to automate repetitive tasks, saving countless hours of manual effort across multiple projects.
  • Excelled in HDL languages like Verilog and VHDL and Verification methodologies like VMM, UVM and OVM

Education

Master of Science - Microelectronics

BITS
Pilani
04.2001 -

Bachelor of Technology - Electronics And Communication Engineering

CUSAT
Kochi, India
04.2001 -

Skills

Languages/Methodologies : SV, UVM, OVM, C, C, VHDL, Verilog, Perl, Python, Ruby

Protocols : AXI, AHB, APB, ACE, UART, SPI, I2C, USB(Basics), Bluetooth standards

Architectures : ARM , Intel

Simulators : VCS, Questasim, Verdi, IES

Emulators : Z1, Zebu and Veloce

Version Control Systems : GIT, Clearcase, Designsync, SVN, CVS

JIRA, HSD, Github, Github copilot

SOC level, Subsystem level and IP level verification

Accomplishments

  • Global Recognition Award and multiple OneIntel awards - Intel
  • Qualstar multiple ThankQ Awards - Qualcomm
  • Bravo Award - ARM
  • Multiple Feather in My Cap Award , Best Project Delivery MESH Award and multipleShining Star Awards - Wipro

Timeline

Silicon Domain Architect

Intel Technologies PVT LTD
04.2021 - Current

Senior Verification Lead Engineer

Qualcomm Technologies PVT LTD
09.2018 - 04.2021

Senior Verification Engineer

ARM Embedded Technologies PVT LTD
07.2015 - 09.2018

Senior Verification Engineer

Wipro Technologies
12.2009 - 07.2015

Master of Science - Microelectronics

BITS
04.2001 -

Bachelor of Technology - Electronics And Communication Engineering

CUSAT
04.2001 -
Asina P KSilicon Architect (Verification)