Summary
Overview
Work History
Education
Skills
Accomplishments
Interests
Areas Of Interest
Timeline
SoftwareEngineer
Champa  Ram

Champa Ram

RTL Development
AJMER

Summary

To further my understanding on IP/ASIC/SOC design developments and modern system security, while maneuvering my team and organisation to growth and acclaim.

Overview

5
5
years of professional experience
5
5
years of post-secondary education
2
2
Languages

Work History

Senior Security Design Engineer

Qualcomm
Banglore
08.2021 - Current
  • Currently working as part of the QualComm security design group for enabling security based RTL design IP which serves as HW Security {RoT} for SoC. Worked on multiple design feature for different markets like Handsets, Automotive and Compute etc.
  • Worked on IP involving RISC-V CPUs, Low Power concept , DMA and multiple access-control blocks.
  • Included responsibilities : starting from understanding the arch spec, prepare/review u-Arch then designing the RTL, followed by the RTL reviews/sanity verification at design end.
  • Collaborated with various teams to enable the IP integration and testing. Well documented the design impl and programming guide for other teams.
  • Worked with verification/emulation teams for full-end feature verification through test plan reviews and debugging etc. Worked on various projects and delivered the quality design.
  • Lead a few initiatives to optimize design in terms of area and automation.
  • delivered multiple knowledge sharing sessions with other design groups.

Module Lead - RTL Design

Logic Fruit Technologies
Gurugram
04.2021 - 08.2021
  • Worked with clients on finalizing the architecture of design provided the high level requirement spec.
  • Worked with design team on getting the design ready and tested with the help of DV team. Debugged with verification team.

RTL Design Engineer

Logic Fruit Technologies
Gurugram
07.2019 - 04.2021

During my tenure in this company, I worked on designing RTL for FPGA based systems where we were to implement various design based on design spec provided by architecture team. I really gained many important and essential personal characteristics and professional skills.

Education

Bachelor of Technology - Electronics And Communication Engineering

NIT KURUKSHETRA
KURUKSHETRA
07.2015 - 06.2019

High School Diploma -

GYAN VIHAR SCHOOL
BIDIYAD, NAGAUR
01.2013 - 06.2014

Skills

    Languages : Verilog, System Verilog, Python, Perl

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Accomplishments

  • Timely and quality work delivered against timelines assigned. Worked with other teams in the SoC.
  • Able to incorporate last minute requirements/architectural updates without much impact on timelines at multiple instances.
  • Feedback shared to arch team on architectural misses through great understanding of the spec.
  • Sound understanding of design tasks/features assigned.
  • Multiple initiatives to share design knowledge as well as design improvements.

Interests

Table Tennis

Sports/Cricket/Gym

Areas Of Interest

  • Digital Design
  • SoC security
  • System Archietecture

Timeline

Senior Security Design Engineer

Qualcomm
08.2021 - Current

Module Lead - RTL Design

Logic Fruit Technologies
04.2021 - 08.2021

RTL Design Engineer

Logic Fruit Technologies
07.2019 - 04.2021

Bachelor of Technology - Electronics And Communication Engineering

NIT KURUKSHETRA
07.2015 - 06.2019

High School Diploma -

GYAN VIHAR SCHOOL
01.2013 - 06.2014
Champa RamRTL Development