Passionate and detail-oriented VLSI Physical Design Engineer with 1.5 years of experience in chip design layout, and verification. Seeking to leverage expertise in physical design to contribute to cutting-edge projects.
Overview
6
6
years of professional experience
Work History
Intern
Entuple Technology
Bangalore
06.2024 - Current
Optimized synthesis results to meet timing constraints and power budgets.
Created floor plans with high utilization of area, power and performance goals.
Developed and implemented physical design methodology for digital ICs.
Performed timing closure analysis, optimization and verification of chip designs.
Trainee
Etechprowess
Bangalore
09.2023 - 05.2024
Created scripts for automation of the physical design flow using TCL.
Conducted physical design activities such as floor planning, synthesis, timing closure, power analysis and STA.
Analyzed reports from parasitic extraction tools like PrimeTime SI, PT-SI, QRC to ensure correctness of data used in timing signoff runs.
Software Engineer
Wipro
Bhubaneswar
04.2022 - 06.2023
Designed databases to store application data using SQL Server or MongoDB technologies.
Integrated third party APIs into the backend system for additional features and functionality.
Collaborated with front-end developers to ensure a seamless integration of the back-end system with the user interface.
Implemented RESTful web services for various client-side applications.
Software Engineer
Mindtree
Bangalore
02.2019 - 03.2022
Involved in Requirements gathering
Developed Rest web services in the Digital Wallet service module.
Implemented scheduler in Java application.
Performing program design, coding and development - Performing unit testing.
Created Services to consume REST API .
Education
Master of Science - Electrical, Electronics and Communications Engineering
Utkal University
Bhubanewar
01-2019
Bachelor of Science - Electrical, Electronics and Communications Engineering