Results-oriented Design Verification Engineer with expertise in system-level verification, UVM methodology, and digital circuit design. Proficient in SystemVerilog and skilled at developing comprehensive test plans to ensure product quality. A problem-solver who efficiently resolves bugs and drives innovation.
Project Details: Intel Xeon Server SoC
Tech Mahindra Cerium System Pvt. Ltd.
Client: Intel
Responsibilities:
- Verified IP components with the Security Assurance Interface (SAI) within the Xeon Server SoC.
- Automated script generation using CRIF files to enhance verification efficiency.
- Conducted VCS simulations to verify design functionality and robustness.
- Developed front-door and backdoor sequences to ensure comprehensive test coverage.
- Executed scripts to validate the SAI feature at the SoC level, ensuring security compliance.
- Managed regression tests (X-propagation, congruency checks, warm resets) and resolved failures.
- Ensured RTL implementation met OSXML specifications for design integrity.
- Compiled test lists for various IPs to streamline verification efforts.
- Generated COBRA reports for TAP and VISA validation.
- Worked on RAL-based sequences to improve verification accuracy.
- Verified sideband interfaces and IOSF protocols for robust communication.
Synopsys Inc
Responsibilities:
- Supporting VCS tool features and troubleshooting.
- Verified design implementations using simulation tools.
- Enhanced knowledge of SystemVerilog constructs for improved methodologies.
- Maintained Physical Design Documentation to meet industry standards.
- Authored customer solution articles for Physical Design tools.
- Reviewed knowledge articles on Fusion Compiler debugging issues