Summary
Overview
Work History
Education
Skills
Certification
Accomplishments
Projects
Publications
Volunteering
Declaration
Websites
Timeline
Generic

DONTHI REDDY KAVYA

PUNGANUR

Summary

A final-year Electronics and Communication Engineering student at IIIT RGUKT, RK Valley, seeking an opportunity to apply my technical knowledge, problem-solving skills, and eagerness to learn in a dynamic work environment. Motivated to contribute effectively to organizational goals while gaining practical industry experience.

Overview

1
1
year of professional experience
1
1
Certification

Work History

Embedded Systems and IoT intern

SURE ProEd
02.2025 - Current
  • Currently pursuing a six-month internship in Embedded Systems and IoT, focusing on real-time sensor integration and microcontroller-based development.

FPGA-based VLSI design intern

SENSE SEMICONDUCTORS AND IT SOLUTIONS PVT.LTD.
05.2025 - 06.2025
  • Successfully completed hands-on training in FPGA-based VLSI design, emphasizing digital electronics and Verilog HDL implementation on FPGA platforms.

Education

BACHELOR OF TECHNOLOGY - ELECTRONICS AND COMMUNICATION ENGINEERING

Rajiv Gandhi University of Knowledge Technologies
RK VALLEY
01-2026

Pre University Course -

Rajiv Gandhi University of Knowledge Technologies
RK VALLEY
01-2022

Secondary School Certificate -

A.P Model School
A.N.Kunta
01-2020

Skills

  • Digital Logic Design
  • Analog Electronics
  • Verilog HDL
  • Python
  • C
  • Basics of IoT
  • Microcontrollers and Platforms

Soft Skills:

  • Communication Skills
  • Team collaboration
  • Multitasking
  • Adaptability

Certification

  • FPGA Based VLSI Design Workshop, Gained hands-on experience in designing combinational, sequential circuits and Digital clock on FPGA boards.
  • EDX-Analog Electronics
  • Certificate of Excellence in FPGA-Based VLSI Design, As a part of Industrial hands-on training - SSIT
  • Certificate of Completion, 2-weeks offline industrial hands-on training held at VVIT University-Nambur
  • NPTEL ONLINE CERTIFICATES, SILVER : VLSI Physical Design with Timing Analysis, IIT Roorkee, SILVER : Understanding Incubation and Entrepreneurship, IIT Bombay

Accomplishments

  • Secured Topped the class place in FPGA-BASED VLSI as a part of industrial Hands-on Training Program 2025 held at VVIT University, Nambur
  • Qualified for NMMS(NATIONAL MEANS-CUM-MERIT SCHOLARSHIP)

Projects

FPGA-BASED SMART PARKING MANAGEMENT SYSTEM WITH DISPLAY MODULE | Xilinx Vivado

  • Developed a Smart Parking System using Verilog HDL on the Artix-7 FPGA platform to monitor real-time vehicle entry,
    exit, and individual slot availability. The system uses IR sensors to detect vehicle presence at each parking slot and at
    the entry/exit points. Occupancy status is dynamically displayed on a 16x2 LCD, while entry/exit directions and
    available slots are indicated through a 7-segment display. The design ensures efficient space utilization and provides a
    hardware-level solution for automated parking management.

DIGITAL CLOCK USING FPGA(Field-Programmable Gate Array) | Using Spartan-6 board

  • Designed and implemented a Digital Clock using an FPGA to display real-time minutes, seconds.Developed the system
    using Verilog and simulated it in ISE for verification. A 7-segment display for output visualization.

REAL-TIME TEMPERATURE AND HUMIDITY MONITORING SYSTEM | ESP-IDF

  • Designed a real-time monitoring system using the ESP32 microcontroller and DHT22 sensor to measure ambient
    temperature and humidity. Developed using the ESP-IDF framework, the system continuously reads sensor data and
    checks for threshold breaches. When limits are exceeded, it securely sends automated email alerts via the SMTP protocol
    using TLS encryption. Ideal for smart home, agricultural, and industrial environment monitoring.

Publications

  • FPGA-Based Smart Parking Management System with Real-Time Slot Monitoring and Entry/Exit Detection,
    International Journal of Engineering Research & Technology (IJERT), Vol. 14, Issue 07, July 2025.
    Available at: ijert.org/SmartParking

Volunteering

CO-ORDINATOR of COMPETITIVE EXAMS CLUB

  • Organizing study groups and Sessions,Planning events and activities.

Declaration

I hereby declare that the above information is to the best of my knowledge and belief.

Timeline

FPGA-based VLSI design intern

SENSE SEMICONDUCTORS AND IT SOLUTIONS PVT.LTD.
05.2025 - 06.2025

Embedded Systems and IoT intern

SURE ProEd
02.2025 - Current

BACHELOR OF TECHNOLOGY - ELECTRONICS AND COMMUNICATION ENGINEERING

Rajiv Gandhi University of Knowledge Technologies

Pre University Course -

Rajiv Gandhi University of Knowledge Technologies

Secondary School Certificate -

A.P Model School
DONTHI REDDY KAVYA