HARIBABU P

PCB Layout Designer experienced in Allegro and Altium, delivering complex designs that exceed project specifications through effective collaboration. Managed cross-functional teams to optimize performance and ensure timely deliverables while designing PCB footprints for diverse markets. Committed to embracing new challenges and contributing to innovative projects.

PR Energy (System project):

• PDM board (3.4KW) System project involving 4 different boards tailored for distinct applications., Up to a 6-layer PCB design with physical dimensions of 30cm x 26cm., Designed for a maximum of 3.4kW (48V at a maximum current of 200A)., Features power switching between the panel side and the battery side, with mechanical mounting holes strategically placed for PCB stacking., Iterating and acting on critical Power Integrity (PI) analysis updates for high-current paths. Gerber generation and Cam verification.

High-Speed Design (SERVER BOARD):

• Hardware Architecture: Enterprise Server Board Design, Multi-Processor (CPU) Layout, High-Density DDR4/DDR5 Memory Matrix Escapes.
• High-Speed Memory Layout: Strategically positioned CPUs and DIMM sockets on complex server boards to achieve short, clean, and optimized escape routing paths for high-volume, high-density memory traces.
• Power & Thermal: PDN Optimization, VRM Placement Strategy, Heavy Copper Layout (1 oz–3 oz), Thermal Via Matrix Design.
• SI/PI: Controlled Impedance Routing (85ohm / 90ohms and 100Ohms, Crosstalk Mitigation (3W,5W, &7W Rules), Via Stub Elimination (Back-drilling) reference vias for high speed differential Pairs.
• Blind & Buried Vias: Used different vias structures for the Clamp shell placed footprints with blind and berried via fanouts to escape the signals.
• Power Integrity (PI) & PDN: Optimized Power Distribution Networks (PDN) for high-performance processors by tightly placing Voltage Regulator Modules (VRMs) adjacent to CPU cores. Isolated power plane optimization for (AC, DC) Power and GND shapes.
• Decoupling Strategy: Filtered high-frequency noise and stabilized power delivery by meticulously situating decoupling capacitors directly underneath and immediately adjacent to primary IC power pins.
• Thermal Management & Heavy Copper: Designed high-current power planes utilizing heavy copper (1 oz to 3 oz) and engineered large matrices of thermal vias under hot components to effectively pull heat to internal copper planes, supporting forced-air and liquid cooling systems.

ECAD Library:

• Footprint created for different companies like Google, IBM, Analog Devices with their own standards for the footprint creation.