Overview
Work History
Education
Skills
Certification
Generic
HEMANTH MOLLETI

HEMANTH MOLLETI

RF/Analog Designer - Senior

Overview

6
6
years of professional experience
4
4
Certifications

Work History

RF/Analog IC Designer

Mediatek
07.2023 - Current
  • Design of an LC-based clock buffer for the G band WiFi 8 MIMO Transmitter(ongoing), Optimizing for output swing, low phase noise, and spur suppression


  • Design of FVF-based replica LDO for XO clock buffers in GNSS chip, Designed balancing trade-offs like dropout, quiescent current, noise, PSRR, and multi-loop stability, Contributed to the floor plan and layout of the LDO, achieving close correlation between pre- and post-layout results, Measured taped-out LDO performance is as expected, and has a 30 mV step for each feedback code across corners


  • Design of a buffer-based LDO at 55 nm for WiFi chip


  • Worked on WiFi-6E G-band Transmitter chain - TOP LEVEL, Checked key performances such as gain, HD3, Psat, AM-AM, and AM-PM for both pre- and post-layout with EMX extractions


Junior Research Fellow

PXE, DRDO
08.2019 - 03.2021
  • Designed microstrip patch antennas for phased array tracking radars
  • Contributed to Indigenous development of tracking radars, focusing on link budget calculations
  • Carried out RCS simulations of artillery shells in CST Microwave Studio
  • Hands-on experience with RF signal generators, VNAs, and spectrum analyzers

Education

Master of Technology - RF Design & Technology

Indian Institute of Technology
Delhi
06.2023

Bachelor of Technology - Electronics & Communication

Anil Neerukonda Institute of Technology
Visakhapatnam, India
01.2017

Skills

Cadence Virtuoso

Certification

Phase-Locked Loop from IIT Madras through NPTEL

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HEMANTH MOLLETIRF/Analog Designer - Senior