JAY SHAH
Bangalore
Summary
Detail-oriented Staff Engineer with over 9 years of experience in verifying complex ASIC designs. Proven track record in leading verification teams and executing successful verification plans for cutting-edge semiconductor products. Adept in various verification methodologies, including UVM, SystemVerilog, and formal verification. An enthusiastic team player, and deep creative thinker.
Overview
10
10
years of professional experience
Work History
Staff Engineer
Qualcomm India Pvt Ltd
Bangalore
12.2023 - Current
- Working on Qualcomm's interrupt controller based on ARM GICv4.1 architecture.
- Worked alongside Architects and principal engineers to build test bench environment.
- Collaborated with the Micro Arch and Design team to develop test plans for shared peripherals and generic interrupts.
- Developed Arch model and foundational environment for end-to-end physical interrupts.
- Led a team of 3 engineers in test bench development, focusing on testcase/sequences coding and coverage coding.
- Tool: Synopsys VCS
Senior Lead Engineer
Qualcomm India Pvt Ltd
Bangalore
05.2021 - 11.2023
- Leading verification team for the Trace NoC Wrapper verification
- Worked on different verification specs/test plan for different debuggability of trace noc wrapper IP
- Collaborated closely with US team, France team, Architects for new environmental update in verification test bench
- Created new testcases / Sequences from the scratch and worked on scoreboards/coverage updates
- Tool : Synopsys VCS / MTI
- Worked on formal connectivity for Trace NoC wrapper-level check.
- Tool : Cadence Jasper Gold
Digital Design Engineer
Intel India Pvt Ltd
Bangalore
07.2019 - 05.2021
- Company Overview: Leading verification team for the server based SoC designs
- Tool: Jasper Gold/VC Formal
- Leading verification team for the server based SoC designs
- Working on different formal tool application like connectivity checks, package level connectivity checks, coverage checks, low power checks
- Managing formal team of 3 people
- Leading verification team for the server based SoC designs
- Tool: Jasper Gold/VC Formal
- Tool: Jasper Gold/VC Formal
Modem Verification Engineer
Intel India Pvt Ltd
Bangalore
01.2018 - 06.2019
- Company Overview: Worked on Debug subsystem and block functional verification with coverage closure
- Tool: Synopsys VCS
- Worked on Debug subsystem and block functional verification with coverage closure
- Handled test plan creation and test bench development work at subsystem and block level
- Handled code coverage with regression and also functional coverage closure
- Worked on Debug subsystem and block functional verification with coverage closure
- Tool: Synopsys VCS
- Tool: Synopsys VCS
Engineer 1
Qualcomm India Pvt Ltd
Chennai
08.2016 - 01.2018
- Company Overview: Worked on Qualcomm Specific bus protocol verification
- Tool: Synopsys VC formal
- Worked on Qualcomm Specific bus protocol verification
- Handled Test plan creation, Test bench development and test cases coding
- Worked on Formal Verification using assertions and verified protocol basic functionality
- Worked on Qualcomm Specific bus protocol verification
- Tool: Synopsys VC formal
- Tool: Synopsys VC formal
Intern
Broadcom Ltd
07.2015 - 06.2016
- Company Overview: The profile of internship was Verification and Validation of Layer 2 Ethernet
- The profile of internship was Verification and Validation of Layer 2 Ethernet
- Worked RTL Functional Verification
- Handling Test plan creation as per the architecture specification
- Handling test bench development and test cases coding
- Handling code coverage and functional coverage
- The profile of internship was Verification and Validation of Layer 2 Ethernet
- Tool: Synopsys VCS
Education
M.Tech - VLSI Design
VIT University
Vellore, Tamilnadu06.2016
B.Tech - Electronics & Communication
LDRP-ITR
Gandhinagar, Gujarat05.2013
Skills
- Team leadership
- System Verilog
- UVM
- Test plan creation
- Debugging techniques
- Cross-functional collaboration
- Effective communication
Accomplishments
- Completed "Mentoring Matters: Leader Connect Program" - Aug, 2024
- Recognition Awards for Excellent work on verification of Trace NoC verification
- Departmental Recognition Award for Excellent work on formal verification for Server SoC - Oct, 2020
- Spontaneous Recognition Award for Excellent work on formal verification - Dec, 2018
Timeline
Staff Engineer
Qualcomm India Pvt Ltd
12.2023 - Current
Senior Lead Engineer
Qualcomm India Pvt Ltd
05.2021 - 11.2023
Digital Design Engineer
Intel India Pvt Ltd
07.2019 - 05.2021
Modem Verification Engineer
Intel India Pvt Ltd
01.2018 - 06.2019
Engineer 1
Qualcomm India Pvt Ltd
08.2016 - 01.2018
Intern
Broadcom Ltd
07.2015 - 06.2016
M.Tech - VLSI Design
VIT University
B.Tech - Electronics & Communication
LDRP-ITR
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