Summary
Overview
Work History
Education
Skills
Timeline
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jyoti Shettar

FLASH Layout Manager
Mangalore,KA

Summary

Accomplished FLASH Layout Manager at Texas Instruments, demonstrating exceptional team leadership and operations management. Expert in enhancing productivity through advanced layout tools, successfully developing new IP in FLASH memory technology. Proven track record in strategic planning and performance management, with a flair for implementing complex layout blocks in cutting-edge technologies.

Overview

20
20
years of professional experience

Work History

FLASH Layout Manager

Texas Instruments
01.2017 - Current
  • Managed and motivated employees to be productive and guiding the team members implement leaf layout of leaf cells
  • Enhanced team productivity by providing training on advanced layout tools and methodologies.
  • Help team in debugging and resolving all the verifications.
  • Maximized performance by monitoring daily activities and mentoring team members.
  • coordinating with designers to understand the design requirement.
  • coordinating with PDK team in the development of new technology and reporting the issues we are seeing
  • Development of new IP's FLASH memory Bank and Flash charge Pump in T28 technology
  • Delivering BANK and PUMP of different sizes and making necessary updates in the layout as per schematic changes in older technologies on time.


Technical Team Lead

IBM
01.2015 - 12.2016


  • Hired, trained and mentored staff to maximize effectiveness.
  • Coordinating with designers in Israel, Germany, USA to understand design requirement.
  • Implement layout blocks like Memory, PLL, Charge Pump from scratch in 10nm , 7nm technologies

Layout Lead

Apple Computers
01.2013 - 11.2014


  • Managed multiple projects like Memory, Transmitter and receiver simultaneously, meeting tight deadlines without compromising on quality.
  • Implemented Layout in 16nm and 14nm technologies from scratch.
  • Well planning on Floor plan, routing and integrating the blocks till the top level, and then top level verifications like DRC, LVS, Antenna, IR, EMIR. Took care of Latchup, cross coupling issues. Shielding necessary signals, and calculating metal width based on the current requirement.


Analog Layout Design Engineer

Texas Insteruments
03.2005 - 01.2013


  • Maintained up-to-date knowledge about industry trends, advancements in technology, and emerging challenges within the analog layout domain.
  • Involved in the layout of Pitch matched Senseamp layout, and other drivers used in the FLASH Memory bank.
  • Delivered optimal solutions for complex routing problems through meticulous planning and innovative approaches.
  • Reduced design cycle time with effective floor planning and placement strategies for complex circuits.

Design Engineer

Analog Devices
01.2005 - 08.2007

Worked closely with Senior designer to understand the design requirement and involved in the layout of Chargepump , Resistance requirement from BOND pad to the pin was 1 OHM and calculated the metal width based on requirement and also look care of electromigration since the nets were carrying large currents.


Executed same project in 120 nm technology.

Education

Master of Science - MSEE in Microelectronics And Nano Technology

California State University
Long Beach, USA
04.2001 -

Bachelor of Science - BE in Electronics And Communications

BEC
India
04.2001 -

Skills

Team Leadership

Operations Management

Strategic Planning

Performance Management

Timeline

FLASH Layout Manager

Texas Instruments
01.2017 - Current

Technical Team Lead

IBM
01.2015 - 12.2016

Layout Lead

Apple Computers
01.2013 - 11.2014

Analog Layout Design Engineer

Texas Insteruments
03.2005 - 01.2013

Design Engineer

Analog Devices
01.2005 - 08.2007

Master of Science - MSEE in Microelectronics And Nano Technology

California State University
04.2001 -

Bachelor of Science - BE in Electronics And Communications

BEC
04.2001 -
jyoti ShettarFLASH Layout Manager