KARTHIK S

• Lead end-to-end PCB design processes, including project analysis, Providing Layout Guidelines, Review the layout stage by stage
• Good Knowledge in Both SLT(Commercial,Evaluation and Characterisatiion PCB) and ATE(S93k.Ultraflex,T2K,ETS800,ETS364 etc,..)
• Project planning, Layer estimation , Stackup planning and Resource / schedule planing
• Managing a team of layout Engineers to design and implement PCB layout for Board mechanicals, Placement, guiding Various signal routing such as High speed, Analog, power and sense, Length matching and Layout reviewing till Gerber Generation.
• Collaborated with PI/SI teams to optimize designs and implemented recommendations for enhanced performance.
• Communicated with global clients (Microchip, Onsemi, Broadcom, Mozartsemi,Ferric, Texas Instruments) and fab houses to resolve CAM queries and ensure manufacturability.
• Reviewing the board mechanical, Mating and Enclosure verification with 3d step models and Guiding the layout team based on the requirement.
• Project Experience

Microchip Projects: Polar Eval Kit, Polar Video Kit, PolarFire Highspeed Validation, RT-PF Eval Kit, RT-PF IOFMAX, RT-PF SSO Board, Flash pro Project, GPON Carrier Boards

• Designed high-speed layouts (up to 18 layers) with 1mm BGA (1509 pins), DDR3, and FMC connectors.
• Managed loosely coupled differential pair routing, length matching, and back-drill concepts.
• Responsibilities: Communicated and driving the entire project with layout engineer and client, and reviewed the Highspeed, Daughter board mating and mechanicals and providing SI and special layout requirements to meet the interface guidelines.

Broadcom Projects: BCM6719 8 site Load Board Ultraflex and BCM4918 4 Site Loadboard

• Designed low- and high-speed with RF layout (up to 54 layers) with 0.6mm BGA, with Blind vias
• Responsibilities: Drive the entire project with layout engineer from End to End with SI optimization of RF, PCIE , USB Loop back signals. Providing the Critical layout Guideline and Reviewed the layout on each stage and provided feedback optimization. Also Communicated with customer on each stage such as Placement, Highspeed/RF routing optimization, and Final file approval for manufacturing

Onsemi ATE: Projects: Vega 4 site T2K Load-board, FAN49130 ETS800 32Site probe-card,ETS364 Mother Board, NCP303390/NCP303345 Pizza Board

• Designed Mutisite board with both FT and probecards with critical flatness such as 3mil per inch.Also worked on Mutlisite probe-card in Wired space transformer with Daughter board up to 40 layer count.
• Responsibilities: Driving the entire project with layout engineer and client, providing special layout guidelines, critical mechanical requirement such as Probe keep-out, web frame, stiffener keep-out.

Semtech Projects: S93K Halfsize Template, Daughter Boards

• Designed high-speed layouts (40GHz–75GHz, 8–16 layers) with Semtech connectors and ground stitching vias.
• Responsibilities: Driving the entire project with layout engineer and client, providing critial layout guidelines,and work with simulation engineer to providing SI optimization.

Analog Devices Projects: Eagle HP BUB Board, Atlanta Daughter board, EVAL Melody9 Board

• Designed highspeed section with DDR4 interfance in fine pitch such as 0.5mm pitch, Worked on various interfaces such as HDMI, USB, Ethernet Analog signals for Audio interface with defined impedance as 85ohm, 100 ohm,90 ohm.
• Responsibilities: Driving the entire project with layout engineer and client, providing critial layout guidelines,and work with simulation engineer to providing SI optimization.

Ferric Projects: FE1512, FE1202 High-Current Boards

• Designed low-speed, high-current boards (10 layers, 3–2 oz copper, 180A).
• Responsibilities: Driving the entire project with layout engineer and client, providing critial layout guidelines.