Summary
Overview
Work History
Education
Skills
Certification
Extracurricular Activities
Projects
Honours And Achievements
Positions Of Responsibility
Affiliations
Languages
Websites
Timeline
Generic

KRISHNA KISHOR

Siwan

Summary

Seasoned Senior Hardware Engineer armed with robust experience in designing, testing and troubleshooting complex hardware systems. Strengths include an adept understanding of microprocessor architecture, digital design principles, and system validation techniques to ensure optimal functionality. Contributed significantly in prior roles by implementing innovative solutions to enhance product performance and reliability.

Overview

3
3
years of professional experience
1
1
Certification

Work History

Senior Hardware Engineer

Samsung Semiconductor India Research
Bengaluru
08.2025 - Current
  • Owned circuit validation activities for SSDs and PSSDs, ensuring power integrity and signal integrity.
  • Expanded responsibilities to include schematic and PCB design using KiCad for board-level design.
  • Completed Design Verification training focused on Verilog, SystemVerilog, and UVM for front-end verification.
  • Collaborated with cross-functional teams to integrate circuit validation results into design improvements.
  • Maintained automation scripts for test equipment, enhancing reproducibility and reducing test cycle time.

Student Engineer Trainee

Samsung Semiconductor India Research
Bengaluru
01.2025 - 07.2025
  • Conducted circuit validation on SSDs and PSSDs, measuring key parameters such as inrush current, power-on sequence, I²C signal integrity, power integrity, switching breakdown voltage/current, low-power mode latency, high/low-frequency noise injection, system delay, and PMIC performance.
  • Automated test workflows for the Keysight MXR208B oscilloscope and N6705C power analyzer, using SCPI commands, reduce manual effort and improve test efficiency.
  • Conducted end-to-end validation testing independently, ensuring complete coverage and quality reporting within the internship duration.
  • Received the SPOT Award for outstanding performance and ownership during the internship.
  • Completed training in Verilog, SystemVerilog strengthening digital design and verification knowledge.

Teaching Assistant

IIT BHU
Varanasi
01.2024 - 01.2025
  • Company Overview: Indian Institute of Technology (BHU), Varanasi. Website: http://www.iitbhu.ac.in
  • Assisted in conducting and supervising Digital Communication lab sessions, guiding students through practical experiments and troubleshooting.
  • Evaluated lab assignments, quizzes, and exams, providing constructive feedback to enhance student understanding.
  • Supported course instructor with lesson planning, grading, and lab setup to ensure smooth operation of the lab.
  • Indian Institute of Technology (BHU), Varanasi. Website: http://www.iitbhu.ac.in

Training and Placement Representative

IIT BHU
Varanasi
01.2023 - 01.2025
  • Company Overview: Indian Institute of Technology (BHU), Varanasi. Website: http://www.iitbhu.ac.in
  • Coordinated with over 20 companies to organize campus recruitment drives.
  • Facilitated effective communication between students and potential employers, ensuring smooth execution of recruitment processes.
  • Analyzed placement data to identify trends and improve strategies for increasing student employability.
  • Indian Institute of Technology (BHU), Varanasi. Website: http://www.iitbhu.ac.in

Education

M-Tech - Communication Systems Engineering

IIT (BHU)
Varanasi
07-2025

BTech - ECE

BPIT
New Delhi
08-2022

CBSE -

Jawahar Vidya Mandir Shyamali
Ranchi
07-2017

CBSE -

DAV Public School
Siwan
06-2015

Skills

  • Xilinx Vivado
  • Vitis HLS
  • EDA Playground
  • PYNQ-Z2
  • C
  • Verilog HDL
  • System Verilog
  • Digital Electronics
  • CMOS
  • Static timing analysis
  • Digital IC Design
  • Analog Electronics
  • Network Analysis
  • KiCad

Certification

  • VLSI SoC Design using Verilog HDL, Certified in Maven Silicon course on VLSI SoC Design using Verilog HDL which included VLSI Introduction, SoC Design, ASIC Vs FPGA, VLSI Design Flow, and Verilog HDL essentials. Basic concepts of data types, Verilog operators, system tasks and functions, and engage in hands-on Verilog labs
  • Machine learning using Python, certified in a Udemy course on machine learning using Python, which included basic machine learning algorithms and deep learning models, with an online assessment score of 97%
  • System Verilog Fundamentals, completed a certified course on System Verilog Fundamentals, covering key concepts in hardware design, verification methodologies, and advanced RTL coding techniques

Extracurricular Activities

  • Inter-school drama competition, 2015-2017, secured 3rd position in inter-school drama competition in class XI
  • Secured 3rd position in the inter-school drama competition in class XII

Projects

  • MTech thesis: FPGA implementation of cuffless blood pressure estimation using PYNQ-Z2. Developed a cuffless blood pressure estimation system on a PYNQ FPGA board using ECG and PPG signals, implemented signal processing and machine learning algorithms to accurately estimate blood pressure, leveraging the hardware acceleration capabilities of the FPGA for improved performance and efficiency
  • Implementation of a 32-bit five-stage pipelined RISC-V processor, 09/24-Present, designing and implementing a 32-bit five-stage pipelined RISC-V processor using Verilog, optimized the pipeline stages (fetch, decode, execute, memory, writeback) to achieve efficient instruction processing and minimize hazards, resulting in improved performance and reduced latency, vending machine using Verilog, designed and implemented a vending machine controller using finite state machine (FSM) in Verilog, handling multiple product selections, payment processing, and change dispensing with optimized state transitions
  • BTech project: Smart street light Developed a smart street light system using Arduino and IR sensors, enabling automatic light control based on pedestrian and vehicle detection, resulting in energy efficiency and reduced operational costs

Honours And Achievements

  • GATE EC, 02/23, achieved AIR 982 among 45,833 students in the GATE EC 2023 paper conducted by IIT Kanpur
  • Received SPOT Award for outstanding performance and ownership during the internship

Positions Of Responsibility

  • Training and Placement Representative, 2023-2025, coordinated with over 20 companies to organize campus recruitment drives Facilitated effective communication between students and potential employers, ensuring smooth execution of recruitment processes Analyzed placement data to identify trends and improve strategies for increasing student employability
  • Teaching assistantship, 2024-present, assisted in conducting and supervising digital communication lab sessions, guiding students through practical experiments and troubleshooting, evaluated lab assignments, quizzes, and exams, providing constructive feedback to enhance student understanding Supported course instructor with lesson planning, grading, and lab setup to ensure smooth operation of the lab.

Affiliations

  • Runner-up in the inter-college badminton tournament hosted by IIT (BHU), Varanasi
  • Captain of BTech College cricket team
  • Lead vocalist of Btech Music Society

Languages

Hindi
First Language
English
Proficient (C2)
C2

Timeline

Senior Hardware Engineer

Samsung Semiconductor India Research
08.2025 - Current

Student Engineer Trainee

Samsung Semiconductor India Research
01.2025 - 07.2025

Teaching Assistant

IIT BHU
01.2024 - 01.2025

Training and Placement Representative

IIT BHU
01.2023 - 01.2025

M-Tech - Communication Systems Engineering

IIT (BHU)

BTech - ECE

BPIT

CBSE -

Jawahar Vidya Mandir Shyamali

CBSE -

DAV Public School
KRISHNA KISHOR