Mahesh Deshmukh
Pune
Summary
Specializing in VLSI and SoC-level verification, with expertise in developing robust verification frameworks for reliable semiconductor systems. Proficient in UVM, AMBA protocols, and foundational knowledge of PCIe PHY architecture. Skilled in IP verification, interconnect validation, and system-level testing, with a keen interest in high-speed interface protocols.
Overview
9
9
years of professional experience
Work History
ASIC Verification Engineer
Sensata Technologies Pvt Ltd.
12.2022 - Current
System Engineer
Tata Consultancy Services (TCS)
03.2017 - 12.2022
Education
Bachelor’s Degree - Electronics and Telecommunication
Jawaharlal Nehru Engineering College
AurangabadSkills
- Methodology: UVM, Scripting: Python, Perl and Shell scripting, Design tools: Questasim, Operating systems: Linux, Windows, Bus protocols known: AMBA - (AXI, AHB, APB), I2C, PCIe-PHY, Other Tools: Gvim, Git, CronTab, Meld, Ctag, Programming languages: Verilog, System-Verilog, C
- Verification Methodologies: UVM, SystemVerilog
- Protocols: AMBA (AXI, AHB, APB), PCIe, I2C
Timeline
ASIC Verification Engineer
Sensata Technologies Pvt Ltd.
12.2022 - Current
System Engineer
Tata Consultancy Services (TCS)
03.2017 - 12.2022
Bachelor’s Degree - Electronics and Telecommunication
Jawaharlal Nehru Engineering College