Mehnaaz Jabeen Shaik

To secure a challenging position in the VLSI design and verification domain where I can utilize my skills in transistor-level design, FPGA development using Xilinx tools, and contribute to innovative semiconductor solutions.

• Internship: Machine Learning by Smart Knower
• Major Project: Advanced vehicle detection and auto penalty collection at traffic signals using IoT

Developed an IoT-based system to detect traffic violations, such as signal jumping, using sensors

Integrated license plate recognition (LPR) technology is used to identify vehicles and automatically issue penalties

Implemented a cloud-based database to store violation records, and send real-time alerts to authorities

• Mini-project: Design of sense amplifier-based flip-flops using conditional bridging

Designed and simulated sense amplifier-based flip-flops to improve speed and reduce power consumption in high-speed digital circuits

Implemented conditional bridging to dynamically control internal node connections dynamically, optimizing charge-sharing and latency.

Performed transistor-level design in Mentor Graphics, achieving a 15% reduction in delay, and 20% lower power dissipation compared to conventional flip-flops

• Major project: Design of a CMOS-based high-speed synchronous up/down counter with clock gating and a compact toggle flip-flop

Conducted a comparative analysis of advanced flip-flop architectures, demonstrating significant reductions in power consumption, and propagation delay for high-performance digital systems

• Participated in Workshop on PCB designing.
• Participated in Workshop focused on RTL to GDSII using Synopsys Tools.

• Playing games and reading books
• Nationality: Indian
• Languages known: English, Hindi, Telugu
• Willingness to Relocate: Yes,

I hereby declare that all the information mentioned above is true and correct to the best of my knowledge

Place: Hyderabad

Signature/E-signature: Shaik Mehnaaz Jabeen