Mohan Rudrappa
Silicon Validation Engineer
Bangalore,KARNATAKA
Summary
Highly motivated Silicon Validation Engineer with over 5+ years of successful experience in High Speed Analog IC characterization. Recognized consistently for performance excellence and contributions to success in semiconductor industry. Strengths in post silicon validation of complex ASIC backed by training in IC design.
Overview
6
6
years of post-secondary education
6
6
years of professional experience
Work History
Silicon Validation/Char Engineer
Texas Instruments
Bangalore, KARNATAKA
08.2018 - Current
- Lead and execute Post Silicon validation of next gen RF Synthesizers, VCO, PLL and clock generators. Starting from defining validation & Test plan on both bench & ATE & develop complete automation suite using python.
- Drive silicon validation reviews with design, test and systems teams and capable of close tracking of device debug activities across functional teams.
- Experienced in schematic design of silicon validation boards using Altium and review PCB layout design to meet high frequency performance.
- Used Python scripts to develop new methodologies to improve silicon validation process to reduce overall validation cycle time by 30%.
- Worked closely with Apps and Fields Support Teams on issues faced by customer and drive productive discussions to arrive at resolution. Also Collaborated with Apps/System teams in developing reference designs to meet customer needs.
- Capable of independently driving tasks and activities to completion in organized and timely manner with excellent quality.
- Partnered with key stakeholders including silicon design, software development, program management, system engineering, and customer engineering teams for successful productize of ASICs.
RFIC Bench Test Engineer
Qualcomm
San Jose, CA
01.2017 - 06.2018
- Develop Characterization Test Plans for post-silicon validation of highly integrated Transceivers used in WiFi/BT applications in highly automated RF test set-up.
- Design and debug of engineering evaluation test boards for device verification characterization.
- Work closely with design teams in assessing IP performance over PVT corners to meet System specification.
- Work closely with RFIC design engineers to optimize design by extensive data collecting, analyzing data and co-designing product based on RF system knowledge .
- Characterization Report includes all parametric data from Transceivers such as Rx path NF, IP2/IM2, IP3/IM3, Gain modes, S-parameters of Rx path components, as well as Tx path PAE, Gain, ACLR, power sweep, Spectrum Emission Mask, harmonics, Out-of-band rejection, frequency sweep, etc.
- Skilled in use of standard lab equipment, including oscilloscopes, meters, AWG, and other measurement instruments.
RF Application Engineer (High Speed Analog IC)
GigPeak
San Jose, CA
06.2015 - 01.2017
- Developed test plans for post silicon testing of High speed analog IC used in VCSEL/DML Drivers & TIAs for 100G/28G Datacom applications.
- Testing, characterizing & evaluate performance of new Opto-electrical designs, High Speed Analog & Mixed signal ICs by completing Design Verification tests for new products, and as second-sourcing efforts for existing products.
- Worked with cross functional staff to produce product documentation and applications collateral.
- Experienced in testing & characterization of E Band Receiver by measuring Noise Figure, IM3, Gain, I/Q & also developed custom SPI protocol using LabVIEW to digitally control RX.
RF Hardware Test Engineer (Intern)
DIRECTV
Los Angeles, CA
01.2015 - 05.2015
- Testing and Characterization of Low Noise Blocks used in Ka & Ku band satellite receivers.
- Characterized Low Noise Blocks by measuring RF parameters (Gain, Noise figure, MER, IMD, LO phase noise, S Parameters, In Band spurs) using 8PSK & QPSK signals.
Education
Master of Science - Electrical Engineering
UNIVERSITY OF SOUTHERN CALIFORNIA
CA, Los Angeles USA 08.2013 - 05.2015
Bachelor of Engineering - Telecommunication Engineering
Dr Ambedkar Institute Of Technology
Bangalore, Karnataka 06.2008 - 06.2012
Skills
Analog and RF Circuit Design knowledge, Analog/RF Layout basics Deep understanding of RF Synthesizer IP including basics of PLL, VCO, Charge Pump design
undefinedTimeline
Silicon Validation/Char Engineer
Texas Instruments
08.2018 - Current
RFIC Bench Test Engineer
Qualcomm
01.2017 - 06.2018
RF Application Engineer (High Speed Analog IC)
GigPeak
06.2015 - 01.2017
RF Hardware Test Engineer (Intern)
DIRECTV
01.2015 - 05.2015
Master of Science - Electrical Engineering
UNIVERSITY OF SOUTHERN CALIFORNIA
08.2013 - 05.2015
Bachelor of Engineering - Telecommunication Engineering
Dr Ambedkar Institute Of Technology
06.2008 - 06.2012
Similar Profiles
Cecilia LopezCecilia Lopez
Production Specialist at Texas InstrumentsProduction Specialist at Texas Instruments
Diane JacksonDiane Jackson
WPL Purchasing Coordinator/Buyer at Texas InstrumentsWPL Purchasing Coordinator/Buyer at Texas Instruments
Jacob TreatJacob Treat
Maintenance Manufacturing Specialist Lead-Wet Etch at Texas InstrumentsMaintenance Manufacturing Specialist Lead-Wet Etch at Texas Instruments
Shyann LucasShyann Lucas
Production Specialist at Texas InstrumentsProduction Specialist at Texas Instruments
Subash BalabhadranSubash Balabhadran
Associate Director, Security and Resilience Global Practice at Kyndryl Solutions Pvt. Ltd.Associate Director, Security and Resilience Global Practice at Kyndryl Solutions Pvt. Ltd.