Pspice
Mohit Bansal
Validation Engineer
Bengaluru,KA
Summary
Electronics and Communication engineer with specialized expertise in test engineering, validation, and circuit design. Proficient in small signal testing, dynamic impedance analysis, and noise measurement using advanced test equipment. Demonstrated success in developing innovative testing solutions and optimizing test platforms at Texas Instruments.
Overview
4
4
years of professional experience
Work History
TEST ENGINEERING INTERN
Texas Instruments
- Specialized in Series Reference testing utilizing Teradyne test platforms
- Gained hands-on experience with industry-standard testing equipment and methodologies
- Assisted in developing and implementing test procedures for semiconductor components
- Contributed to quality assurance processes for electronic reference components
VALIDATION ENGINEER
Texas Instruments
07.2021 - Current
- Designed and implemented a Trim Circuit capable of generating 3-level patterns from microcontroller up to 9V at 1MHz frequency
- Optimized Series Reference platform to enable higher output, significantly reducing execution time
- Conducted comprehensive Shunt Reference validation including Small Signal testing, Dynamic Impedance testing, and Noise measurement
- Engineered an automated handler system for load capacitor switching between small signal and large signal testing
- Implemented Supervisor and Watch Dog testing methodologies for critical electronic components
- Developed and executed AC/DC parameter testing protocols for reference components
Education
Bachelor of Technology - Electronics and Communication
Delhi Technological University
Skills
Testing & Validation:
Small Signal Testing
Dynamic Impedance Analysis
Noise Measurement
AC/DC Parameter Testing
Test Protocol Development
Circuit Design:
Analog Circuit Design
Microcontroller Programming
Test Platform Optimization
Equipment Proficiency:
Software
Altium
Cadence Allegro
Languages
English
Intermediate (B1)
Hindi
Upper intermediate (B2)
Punjabi
Advanced (C1)
Accomplishments
High-Frequency Trim Circuit Design
- Designed and implemented a trim circuit generating 3-level patterns from microcontroller up to 9V at 1MHz
- Enabled precise component calibration and testing capabilities
Series Reference Platform Enhancement
- Redesigned Series Reference testing platform to enable higher output capabilities
- Significantly reduced test execution time while maintaining comprehensive test coverage
Automated Load Capacitor Handler System
- Designed and implemented an automated system for switching load capacitors between small signal and large signal testing
- Significantly reduced test execution time and improved operational efficiency
Timeline
VALIDATION ENGINEER
Texas Instruments
07.2021 - Current
TEST ENGINEERING INTERN
Texas Instruments
Bachelor of Technology - Electronics and Communication
Delhi Technological University