

Engineer with 4+ years of experience working across FPGA verification, system integration, and customer-facing delivery in aerospace and high-speed data systems. Known for end-to-end ownership, strong debugging ability, and delivering reliable solutions in complex, multi-board environments.
DO-254 – IFF-SP Unit: Performed DO-254 compliant FPGA verification using QuestaSim, including requirement-based coverage closure analysis, identification of gaps, and debugging of complex RTL issues through waveform analysis.
10G Ethernet Offload Engine: Integrated and tested high-speed 10G data transfer across multiple FPGA boards as per customer requirements, validating end-to-end data flow and system performance.
Transceiver Module – Primary Radar Development: Developed and tested timing and control signals, created custom AXI IP cores, and performed DAC–ADC loopback testing for functional and signal integrity validation.
Customer & Demo Support: Worked closely with customers to support multi-board AMD/Xilinx FPGA product demonstrations, system bring-up, debugging, and issue resolution.
LRDE - DRDO
LRDE - DRDO
Antenna Control unit developemnt, Testing and debbuging for UFRA - LRDE DRDO.
FPGA Design & Verification: Verilog, RTL Debugging, Testbench Development
DO-254 Compliance: Requirement-Based Verification, Coverage Closure, QuestaSim
FPGA Platforms & Interfaces: AMD/Xilinx Zynq UltraScale, Versal, AXI4, AXI-Stream, AXI DMA, 10G Ethernet
System Integration & Tools: Custom AXI IP Development, IP Integrator, Board Bring-Up, DAC–ADC Testing, Vivado, Python