Accomplished Associate Director at Samsung Semiconductors India Research, demonstrating exceptional strategic leadership and organizational development skills. Spearheaded initiatives that enhanced team collaboration, leading to the delivery of high-quality IPs and fostering key industry partnerships. Proven track record in mentoring and driving team performance, alongside significant contributions to product innovation at SSIR and Cadence Design Systems. Highly organized and self-motivated professional experienced in project management, team development and process improvement. Skilled in developing and implementing strategies to increase efficiency and performance. Passionate about driving business growth and creating positive work environment.
Digital Design
IP/SoC Development
Team Collaboration and Leadership
Decision-Making
Organizational Development
Patents:
- Apparatus and Method for detecting synchronization loss in multi-lane transmitter – US10804904B1
- Multilane transmitting apparatus and method for performing a built in self-test in the multi-lane transmitting apparatus – US20220329405-A1
- 2 more filings in the process
Papers:
- An efficient method to perform functional ECO using Formality ECO – SNUG India 2022
- A configurable interconnect matrix for multiprotocol PHY – Cadence Techcon 2016
Awards:
- Technical Leadership Award – Milap 2018 – SSIR Annual Awards