Nakul M P
Semiconductor Product Validation Engineer
Thiruvanathapuram,KL
Summary
Validation Engineer with 4 years of experience in graphics driver and system validation across complex hardware–software environments. Owned and managed discrete GPU (dGPU) platforms for the past one year as the primary point of contact (POC) for clients, ensuring all deliverables were completed on time. Proven expertise in designing ,executing and analyzing 100+ validation test cases, and in identifying and triaging 150+ defects across functional, performance, and stability scenarios. Strong hands-on experience in failure analysis, root-cause debugging, and data-driven troubleshooting, resulting in a 25–30% improvement in test coverage and defect detection efficiency. Proficient in programming, with a strong quality-first mindset. Seeking a challenging role to drive continuous improvement and deliver reliable, high-quality products. Recognized as UST “Employee of the Month” multiple times for quality and execution excellence.
Overview
4
4
years of professional experience
Work History
Semiconductor Product Validation Engineer
UST Global
10.2021 - Current
- Validated graphics drivers for stability, performance, and functional
compliance across 15+ Windows applications and 100+ game titles, ensuring
adherence to client specifications, and reducing high-impact driver issues in
release cycles.
•
Led validation of the Intel Arc software suite, validating 10+ key features per
release, ensuring stability, performance consistency, and integration quality
across driver and software updates.
•
Consistently identified and logged 20+ valid defects per quarter for over 2
years, maintaining a high bug acceptance rate (>90%), demonstrating strong
defect quality and reproducibility.
•
Performed initial defect triage and minor debugging for 30–40% of identified
issues, including log analysis and failure isolation, helping to reduce developer
investigation time and accelerating fix turnaround.
•
Ensured defect quality standards by validating reproducibility, severity, and
impact for 100% of submitted defects, improving fix accuracy, and reducing
back-and-forth with development teams.
•
Performed graphics driver validation across multiple discrete GPU platforms—
Intel, NVIDIA, and AMD—on PCIe-based systems supporting DDR4 and
DDR5 memory configurations.
•
Used defect tracking tools (HSDES, JIRA) to manage over 100 defects
annually, collaborating closely with cross-functional teams to track resolution
and verification.
•
Executed validation of silicon overclocking scenarios across stress, stability,
and performance workloads, identifying a critical high-severity defect, and
reporting it with precise reproduction steps, resulting in client recognition for
early issue detection.
•
Education
08/2019 Bachelor of Technology: Electrical An
Skills
Quality assurance techniques
Education
Bachelor of Science -
St Thomas College of Engineering And Technology
10.2015 - 08.2019
Timeline
Product Validation Engineer
UST Global
10.2021 - Current
Bachelor of Science -
St Thomas College of Engineering And Technology
10.2015 - 08.2019