Dynamic Engineer at Samsung Semiconductor India Research with expertise in standard cell circuit design with performance and power optimized design. Achieved a 10-12% performance improvement while leading library development in legacy node. Proficient in SPICE simulations and committed to collaboration, ensuring high-quality, reliable circuit designs.
Overview
4
4
years of professional experience
Work History
Associate Staff Engineer
Samsung Semiconductor India Research
Bangalore
07.2021 - Current
Designed optimized standard cell libraries across a broad range of technologies, from 180 nm to 5 nm, to support the development of high-performance and low-power chips.
Led the scratch library development for multiple kits, including FLK, PMK, PBK, and ELK, on legacy nodes for automotive application, managing the complete process from architecture design to library deployment.
Achieved a 10-12% performance gain with a similar area compared to the parent technology, ensuring an improvement in both power and speed.
Performed robustness, reliability, and quality assurance (QA) checks to validate standard cell designs across multiple technology nodes, ensuring high yields, and performance consistency.
Developed automated scripts to streamline various design tasks, reducing the overall design time, and improving efficiency across the team.
Collaborated with layout and characterization teams to ensure the successful design outcome.
Student Trainee
Samsung Semiconductor
Bangalore
02.2021 - 06.2021
Understanding the standard cell design flow.
Worked on automation scripts for mapping pin names to the new naming convention for the legacy technology nodes.
Hands-on experience with Cadence Virtuoso, DRC, LVS check, and essential design checks for a few combo cells, and also performed SPICE simulations for design checks
Education
Master of Engineering - VLSI & Embedded Systems
BITS Pilani
Pilani
05-2021
Bachelor of Technology - Electronics & Instrumentation
Assam Engineering College
Guwahati
06-2017
Skills
Standard cell design
High performance circuit
SPICE simulations
Cadence Virtuoso
Robustness and Reliability testing
Collaboration skills
Perl
MS Excel
Accomplishments
Received the SPOT Award for demonstrating automation skills in leakage prediction scripts
Received the People's Choice Award for demonstrating the standard cell design booth at Developers Day at Samsung
Languages
English
First Language
Bengali
Proficient (C2)
C2
Hindi
Upper Intermediate (B2)
B2
Timeline
Associate Staff Engineer
Samsung Semiconductor India Research
07.2021 - Current
Student Trainee
Samsung Semiconductor
02.2021 - 06.2021
Master of Engineering - VLSI & Embedded Systems
BITS Pilani
Bachelor of Technology - Electronics & Instrumentation
Assam Engineering College
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