Nishanta Boro

Working on the Virtuoso Power Manager tool, used for formal low-power verification of Analog Mixed-Signal Designs.

• Achieved 3x performance gain by optimizing the Boolean reduction engine, which contributed to an overall 200% speed-up of the verification flow.
• Developed a utility to monitor tool performance at various stages, enabling the team to assess the impact of their code in critical areas.
• Successfully resolve critical customer bugs promptly, and with high quality.

Lead a team of four from the India site to work with the Low Power Team for Galaxsim, which is a simulator product developed by X-EPIC.

• Achieved an overall ~40% improvement in performance for UPF Elaboration by analyzing performance using Oracle Analyzer.
• Visited the Shanghai HQ to work more closely with the team overseas.

Team Lead for Low Power Team, Galaxsim

• Implemented Power Management Strategies for simulation.
• Conducted R&D testing and development, creating comprehensive test cases from UPF LRM.

Lead for Frontend Project at India Site

• Spearheaded the integration of an open-source RTL compiler with the in-house synthesis tool.
• Dramatically improved pass rates from ~10% to ~90% within 5 months, across a pool of ~80,000 cases.
• Optimized performance, achieving a ~20% increase in speed by resolving bottlenecks.

Research Project Lead for Netlist Compiler Development

• Designed a lightweight database for efficient Netlist storage.
• Developed a lexx and yacc-based compiler, resulting in ~30% faster compilation compared to the existing in-house compiler.

Individual Contribution

• Provided critical support for XMR/Cross-Module References in the in-house synthesis tool.
• Implemented general purpose algorithm Levelization and Dead Logic Elimination for Netlist Optmization