Padmavijai M

Work experience:

Currently working as a senior professional – I in Capgemini from February 2022 to present. Worked as a Embedded Engineer II – Software Development in Honeywell Technology Solutions Lab PVT Ltd. (HTS) from September’17 to Feb’ 22 (5 years). Worked as a Embedded Engineer – Verification and validation in Honeywell Technology Solutions Lab PVT Ltd. (HTS) from May’14 to September’17 (3 years).

Experience Summary:

Experience in Independent Verification and Validation (IV&V) , Software development in Avionics product like Flight Management System, Flight Control system and Communication and navigation system.

Prototype has been done to prove the software testing using formal method Tools like FRAMA-C.For the same Honeywell recognized and awarded as Outstanding engineer Award.

Prototype has been done to prove the FMS software requirement can be converted as Model based requirement .For the same Honeywell recognized and awarded as Outstanding Achiever Award.

• Experience in ARINC 429 and SPI Protocol. Have been participated in SOI3. Knowledge in Python Programming. Project Details: Takeoff and Landing- FMS for BRGA program: Scope of the Project: The Software development of the TOLD-FMS Software for BRGA program. Role and Responsibility: To develop software code in C++ for IO functionality. Creates Software design document and establish Trace Matrix Responsible to execute the software in target benches EASE (simulation environment) and verify the System functionality. Honeywell proprietary tools used in the project: EASE Simulation tools is used to debug the software and verify the system functionality by integrating the software. Communication and Navigation surveillance for RADAR Hardware Software Integration Testing program: Scope of the Project: The Verification & Validation activity of the RADAR Software against Requirement based testing for the below modules. Role and Responsibility: Updates the Testing details in SVP. To develop tests against requirements and run these tests on target systems Responsible for Creation and fixing SCR (Software Change Request) Interaction with Software Engineers to provide resolution for issues that were raised in the AO (Analysis & Observation) document. Responsible to execute the test in target benches, analyze the results and perform review on the test artifacts Fix the bench related issues. Honeywell proprietary tools used in the project: NGRSIM suite used to execute the requirement-based test in Target/simulator environment. Flight Control Electronics for BRGA component testing program: Scope of the Project: The Verification & Validation activity of the Flight Control Software involves Requirement based testing and Database using Honeywell proprietary tools like CTP, MLTG, STG, PTG and with supplemental Hand code test cases. Role and Responsibility: Updates work Instruction, PSAC, SVP and SAS. To develop tests against requirements and run these tests on target systems Responsible for Creation and fixing SCR (Software Change Request) Responsible for giving demo of Honeywell Proprietary tools to HTS V&V team. Interaction with System Engineers to provide resolution for issues that were raised in the AO (Analysis & Observation) document. Responsible to execute the test in target benches, analyze the results and perform review on the test artifacts. Packet creator (Honeywell Proprietary tool ) used to schedule the review packet. Perform Run for Score and Structural coverage Analysis Disposition Analysis BUP report Validation. Notable Highlights: Worked in flight system team to analyze the ATC communication in text format then understand and mark the phases of flight attributes from the communication between control tower and pilot and understand the specific format used to call the Airlines/flight with the critical information such as airspeed/heading/wind etc.. and document the same information. Worked with Pro-tech team to analyze the various types of tools in formal method which suitable for our current project (Flight Control). Deployed Lean principles in my project through that around 450 hours saved from Budget hours. Implemented Reducing RFS STP Vector execution time & result file size strategy in Flight Control Project. Based upon this strategy showed cycle time reduction from 18 day to 1 day. Supported and Requirement given to Built in Quality tool to ensure the artifact does not have Non-Technical and technical defect (Limited to some extend). Based upon my experience created Standard work instruction (SWI) for BRGA program. Performed verification for MODE LOGIC (aircraft, Helicopter) in BRGA program. Conducted Avionics related Training to the team. Worked with Pro tech team to convert flight management system textual requirements to model and proved that 30% of FMS requirement can be converted as a model.

Six Sigma