Summary
Overview
Work History
Education
Skills
Timeline
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Pallavi

Bangalore

Summary

Accomplished Sr. Applications Engineer at TSMC, adept in performance optimization and client communication. Spearheaded high-impact projects, enhancing application reliability and fostering collaborative environments. Proven expertise in quality assurance and software licensing, with a track record of streamlining processes for efficiency. Excelled in a fast-paced setting at Synopsys, demonstrating exceptional technical writing and cross-functional teamwork.

Overview

8
8
years of professional experience

Work History

Sr. Applications Engineer

TSMC
11.2018 - 03.2024

In the capacity of a Sr. Application Engineer at TSMC, the focus has been on delivering high-quality solutions and providing technical support for various SRAM memory compilers. Responsibilities include collaborating with engineering teams to define project requirements and ensure successful implementation and final release. Continuous improvement of processes and communication with clients to address their technical needs has been essential.

  • Worked on multiple projects to enhance application performance and reliability.
  • Reviewed existing programs to refine, reduce operating time and improve techniques.
  • Single point of contact for N5/N3/N2 nodes for HPC customers.
  • Handle customer's spec, budgeting and Release schedule for SOW preparation.
  • Conducting meetings and taking meeting minutes to resolve the customer and internal teams queries for all compilers single/multi bank memories, two port register files and pseudo dual port compilers.
  • Developing the spec and monitoring the progress for Design teams and QC team to enable the quality of the release and on time delivery.
  • Aligning with testchip and design teams to select the instances for testchip to provide the maximum coverage for silicon and customer usage
  • Enable PDK including device models and central database for design team, layout team and characterization teams.
  • Ensure customer DRC/ERC decks are available and being checked by layout and waivers are provided for the same if any.
  • Alignment of Placement Guidelines Spec, EMIR spec, Aging spec and margining methodology across all teams,
  • Data mining for the prospective PPA to bring the customer on board, PPA analysis before release, and silicon to simulation (S2S) data comparison
  • Prepare release notes and databook for customer understanding and maintain record of Design/Layout checklist as well heir respective waivers for future reference.
  • Engaged in troubleshooting, silicon debugs and optimizing existing flows, resulting in significant performance gains.
  • Provided technical guidance, data mining and databook training and support to junior engineers, fostering a collaborative environment.

Technical Writer

Synopsys
03.2016 - 07.2017
  • Followed company policies and editorial guidelines to craft thorough, well-written content.
  • Carefully documented technical workflows in private wiki for education of newly hired employees.
  • Proved successful working within tight deadlines and a fast-paced environment.
  • Edited and proofread technical documents for accuracy and consistency.
  • Worked collaboratively with cross-functional teams to ensure accuracy and comprehensiveness of documentation.
  • Streamlined and automated documentation processes, resulting in improved efficiency and reduced turnaround times.

Education

M.tech - Electronics And Communications Engineering

Punjabi University
Patiala, Punjab
06-2013

B.tech - Electronics And Communications Engineering

Guru Nanak Dev University (Main Campus)
Amritsar, Punjab
06-2010

Skills

  • SRAM architecture
  • Client communication
  • Performance optimization
  • Version control systems
  • Network engineering
  • Time and budget planning
  • Quality assurance processes
  • Software licensing

Timeline

Sr. Applications Engineer

TSMC
11.2018 - 03.2024

Technical Writer

Synopsys
03.2016 - 07.2017

M.tech - Electronics And Communications Engineering

Punjabi University

B.tech - Electronics And Communications Engineering

Guru Nanak Dev University (Main Campus)
Pallavi