Praveen Saraswat

Experienced RFIC design engineer specializing in power amplifiers (PA), low noise amplifiers (LNA), and transmit/receive (TR) networks for 5G New Radio (NR). Skilled in designing high-efficiency RF circuits using 65nm CMOS and SiGe technologies.

• Methodology for Implementing a Transformer-Based Class J Power Amplifier (Taped-out), Designed and implemented a differential Class J amplifier using a transformer-based approach in 65nm bulk CMOS process. (Submitted in INMMIC 2025)
• Broadband Transmit-Receive Front-End for FR2 5G-NR Frequency Band (Taped-out), Developed an ultra-broadband transmit-receive (TR) front-end network in 65nm bulk CMOS technology for 5G NR band. (Submitted in TMTT)
• Class G-Doherty Power Amplifier-based TR Front-End (Taped-out), Designed a broadband TR front-end network in 65nm bulk CMOS technology for back-off efficiency in OFDM modulated signals. (Submitted In RFIC 2025)
• Doherty Power Amplifier with Compact Load Modulation Network for 5G Applications, Designed a high-efficiency Doherty PA using 65nm CMOS technology with a compact load modulation network optimized for 5G.
• Doherty Power Amplifier-based TR Front-End for 5G mm-wave Applications, Developed a compact and efficient TR front-end network for 5G mm-wave using 130nm SiGe process, integrating a Doherty PA.

Design and Implementation of 270 GHz Power Amplifier in 130nm SiGe: Contributing to the ongoing implementation of a 270 GHz Power Amplifier (PA) in 130 nm SiGe.

• Doherty Power Amplifier with Compact Load Modulation Network for 5G Applications, P. Saraswat and M. Arrawatia, 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS), Edinburgh, UK, 2023, 1-5, 10.1109/NEWCAS57931.2023.10198155
• Doherty Power Amplifier-based TR Front-End Network for 5G mm-wave Applications, P. Saraswat, M. Arrawatia, and R. Bhattacharjee, 2024 22nd IEEE Interregional NEWCAS Conference (NEWCAS), Quebec, Canada, 2024