Preeti K S
Summary
Experienced Validation Engineer at Intel Technology Bangalore with a year of expertise in semiconductor industry. Currently undergoing Internship at Maven Silicon VLSI Training Centre Bangalore. Seeking a challenging role as a Design & Verification Engineer to apply and augment my skills. Proficient in Verilog, System Verilog, UVM and Assertions with hands-on experience in digital design, UVM-based verification, code and functional coverage, AHB to APB Bridge Verification, simulation and synthesis. Well-versed in tools like Mentor Graphics ModelSim, Quartus Prime, Design Compiler and adept in Linux OS. Keen on leveraging expertise in a dynamic work environment.
Overview
5
5
years of professional experience
Work History
Design and Verification Engineer Trainee
Maven Silicon
Bangalore
08.2023 - Current
- Projects: AHB 2 APB Bridge Verification using UVM - To build a test bench architecture
- Create TB components based on architecture
- To obtain the connection of Virtual Interface to communicate with the DUT
- Performed functional coverage for the same
- Router 1X3 Design & Verification EDA Tools: Modelsim, Questasim, Quartusprime - Created a Verification Plan and implemented tests
- Debug failures and regressed them to achieve target coverage
- Designed a TB architecture compatible with verifying Router1x3
- The model consists of an active source agent and an active destination agent
- The source agent drives the packet into the design, while the destination agent manages the read signal, ensuring proper output using the scoreboard model and a signed-off project with 100% functional coverage.
Validation Engineer
Intel Corporation
07.2019 - 07.2020
- Worked as Pre-Silicon Validation Engineer for FPGA Prototyping
- Executing test contents of INTEL specific framework
- Device enumeration for verifying interfaces
- Validating FPGA image sets to execute test contents
- Validating peripheral interfaces such as PCIe, SPI Flash & JTAG
- Firmware load on SPI Flash using FPGA image sets.
Education
Master of Technology - MTech (9.04 CGPA) - Electronics And Communications Engineering
B. M. S. College of Engineering Bengaluru
03-2021
Bachelor of Engineering - BE - Electronics and Communications Engineering
Visvesvaraya Technological University
09-2018
Skills
- Verilog
- SystemVerilog
- Universal Verification Methodology (UVM)
- Assertions
- Functional Coverage
- Code Coverage
- SPI
- I2C
- AMBA AHB
Websites
Timeline
Design and Verification Engineer Trainee
Maven Silicon
08.2023 - Current
Validation Engineer
Intel Corporation
07.2019 - 07.2020
Master of Technology - MTech (9.04 CGPA) - Electronics And Communications Engineering
B. M. S. College of Engineering Bengaluru
Bachelor of Engineering - BE - Electronics and Communications Engineering
Visvesvaraya Technological University
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