Summary
Overview
Work History
Education
Skills
Disclaimer
Languages
Timeline
background-images

R Sandesh

Bengaluru

Summary

Experienced pre/post silicon validation professional with 2 years of expertise in conducting manual and automation testing for various NIC product modules, including Secure Boot, Security Address Space, PCIe Regression, Interrupts, and Resets. Skilled in programming languages like C++ and Python. Currently employed as a Silicon Validation Engineer specializing in Ethernet-Server Validation. Previous experience as a Unit Test Developer for Embedded Software. Proficient in the V-Model Software Development Life Cycle (SDLC) and well-versed in the OSI Networking Model and TCP/IP Model. Extensive knowledge of communication protocols such as UART, I2C, and SPI. Familiar with both Windows and Linux operating systems. Proficient in tools like Denver, Maglan, Enterprise Architect (EA), UART, Dediprog, Trace32, JIRA, GIT, HSD (High-Speed Data), and PythonSV.

Overview

2026
2026
years of professional experience

Work History

Silicon Validation Engineer

Intel
- Current
  • Company Overview: Intel's High speed Ethernet controllers (Network Interface Card)
  • Developing debugging tool for validating NIC
  • Working on Test plan development, Test cases design and development in C/CPP
  • Intel Ethernet NIC validating Stress test, compatibility test, Regression test, full regression testing
  • Experience in post silicon & pre-silicon validation familiar with server platforms (manual and automation testing)
  • Board bring-up (Test Setup) from scratch and installation of required software, drivers and firmware
  • Board level power delivery related testing based on the requirement
  • Currently handling PCIe, Security and Datapath validation domain for Experience on different speeds 10G, 5G, 2.5G, 1G and 100mb features test cases for WLAN interface managers, responsible functionality testing and identifying defects
  • Involved in debugging of different failure scenarios in various levels of validation
  • Troubleshooting the TC, finding root cause of the defects, tracking the bugs towards fixing the issues
  • HSD raising and tracking Bugs using HSD (High Speed Data base) server platform
  • Collecting firmware or boot and driver logs using putty tool once NVM flashed and power Cycle the setup
  • Flashing NVM (firmware) using SPI Serial flash tools like Bobcat and Dedi-prog and checking the card enumeration and link up status on testing board
  • Updating and modifying Test Related data in TFS tool
  • Supported setup bring up activities like connecting LTB, UART module on setup
  • Understanding board and multiple system areas and requires interfaces with Architecture, Design
  • Experience with handling git tool for developing framework
  • Work experience on Hardware & Lab Equipment's
  • Intel's High speed Ethernet controllers (Network Interface Card)
  • Developing debugging tool for validating NIC

Education

BE - Computer Science and Engineering

JSS Academy of Technical Education
Bengaluru, Karnataka

Skills

  • C
  • Python
  • UART
  • I2C
  • SPI
  • Windows
  • Linux
  • PythonSV

Disclaimer

I do hereby declare that the given above are true to the best of my knowledge and belief.

Languages

English
Upper intermediate (B2)
Hindi
Intermediate (B1)

Timeline

BE - Computer Science and Engineering

JSS Academy of Technical Education

Silicon Validation Engineer

Intel
- Current
R Sandesh