RADHIKA MURUGESAN
Bengaluru
Summary
Tenured Hardware Engineer with 6.5 years of pre and post Silicon validation experience. Strong Experience in silicon bring-up, test-plan creation, and execution. In-depth knowledge of Video IP and high-level SOC architecture. Capable professional with a keen eye for detail, exceptional multi-tasking capabilities, and advanced technical knowledge-seeking role. Works at fast pace to meet tight deadlines. Enthusiastic team player ready to contribute to company success.
Overview
7
7
years of professional experience
Work History
Lead Engineer, Senior
Qualcomm
12.2022 - Current
- Oversaw the successful completion of multiple concurrent projects, balancing priorities while maintaining strong attention to detail.
- Collaborated with cross-functional teams to ensure main and delta features are covered as part of validation plan.
- Mentored junior engineers, contributing to their professional growth and overall team productivity.
- Supporting the team on all critical debugs, taking the responsibility for providing proper updates till the fix gets thoroughly validated.
- Keeping and maintaining all the records in confluence page, Sharepoint and project space.
Senior Hardware Engineer
Qualcomm
12.2020 - 11.2022
- Developed Video SVE test plan for mobile and other adjacent market projects - IoT, Automotive, Compute, XR. Developed FuSA test content for Makena AU, Av1 for Compute and EVA.
- Assessed the project scoping and made proper alignment with Design/DV/FW and SW teams to have smooth process
- System test released with good quality that was able to catch part issues (in SF TBU) in SLT before CS
- Drove the team technically and provided guidance on debugs
- Worked on 3rd Party IP Av1. Debugged a random issue and filed 3 DoC CRs and one FW bug.
- Streamlined the Active Power measurement for Video IP in silicon and assessed its scope based on baseline, tech node and metal layers and aligned with Design team.
- Established the practices for documentation, ensuring consistency across all projects and making it easier for team members to collaborate effectively.
Hardware Engineer
Qualcomm
12.2018 - 12.2020
- Creating/Modifying/Improving validation framework for System Level Testing
- Created recorded training sessions for new hires, improving onboarding effectiveness and reducing time spent in training sessions, which helped around 7-8 new hires.
- Accomplished on activities like performance with dragonview, early enablement of pre-si performance.
- Identified the pain points in our execution flow and provided feedback that can help bring improvements in internal test environment.
- System test released with good quality that was able to catch part issues (in SF TBU) in SLT before CS
Associate Engineer
Qualcomm
07.2017 - 11.2018
- Taken single ownership of Video IP functional validation in SVE for BDC chipsets when started as a Fresher.
- Handled 2-3 projects in parallel, one in post-Si, one in Pre-Si and one RMA.
- Communicated with various stakeholders to get needed information and
- Completed all the milestones on or before time and successfully completed 3 projects and 3 RMAs including one critical FW issue was reported and debugged.
- Able to move easily to new Convex infrastructure and splunk updates, was being the PoC for new process to SVE team mates and MM team
Internship
Qualcomm
01.2017 - 06.2017
- Developed a validation framework for Video Encode/Decode using production Firmware(FW) in post-si to do a thorough check of the VCODEC (Video HW accelerator) across various resolutions and video formats.
Education
Bachelor of Engineering - Electronics and communication
Thiagarajar College of Engineering
Madurai, TAMILNADU05.2017
Skills
- Programming language - C
- Debug tools - Jtag/Trace32
- Lab environment
- Test Automation
- Mentoring and Coaching
- Project planning
Accomplishments
- Successfully completed nearly 11+ projects in my ownership including Mobile, Automotive, Compute, XR, IoT chipsets and supported on 11+ other projects including RMA debugs.
- Having technical exposure of all Video architectures - Venus, AR50LT, IRIS 1/2/3/4, EVA versions, FUSA, 3PIP. Also worked on scaled versions, exposed to the areas where it impacts.
- On Bitra, was instrumental in finding a 1 Design Bug in Pre-si, that test is actually out of scope in RUMI platform. Filed 1 Design CR/6 Doc CRs. All Doc CRs led to change in Video power sequence for HPG.
- On Rennell, proactively completed the 80% Video Validation in ES time frame. On Bitra, Completed the SOD plan before 1 month of CS (remotely setup)
- Had done Root Cause Analysis and Action plan for nearly 100+ JIRAs filed under Video Subsystem
- Led the debug in Kalpeni in Pre-Si and identified the issue in RUMI build generation tool.
- Mentored around 10 people in Video team and my KT recorded sessions are the source for all new joiners in Video team.
Languages
Tamil
English
Hobbies and Interests
- Listening Music and Singing
Timeline
Lead Engineer, Senior
Qualcomm
12.2022 - Current
Senior Hardware Engineer
Qualcomm
12.2020 - 11.2022
Hardware Engineer
Qualcomm
12.2018 - 12.2020
Associate Engineer
Qualcomm
07.2017 - 11.2018
Internship
Qualcomm
01.2017 - 06.2017
Bachelor of Engineering - Electronics and communication
Thiagarajar College of Engineering
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