

Lead Validation Engineer at Texas Instruments, I previously held roles as Analog Design Engineer at Samsung Semiconductor India Research and as Analog Engineer at Texas Instruments. My experience spans RF data converters, high-speed interfaces, and FinFET technologies. I am interested in pursuing deeper study at the intersection of VLSI design and semiconductor physics through research in VLSI, photonics, and quantum engineering.
Design for high-speed Retimer-based Time Domain Analog to Digital Converter. AMS Simulating for Voltage to Delay Converter.
Modelling of High-speed Time Domain ADC to generate Power-up and Background Calibration method with MATLAB. Implementing the same in Firmware. AMS Verification of high-speed Retimer by generating Verilog model and Firmware.
Post Silicon Validation for AFE80xx, including IP verification and generating a trim algorithm, and validating the functionality of new architectural features. Responsible for the development of methodologies, execution of validation plans/ coverage, and triage of failures for Stability and Concurrency Validation for AFE80xx, a high-performance, wide bandwidth multi-channel transceiver with 8T8R. Including EVM Design for higher frequency with High Bandwidth Matching Design.
Understood photon interactions with semiconductor detectors and built an experimental setup combining optics and electronics to generate controlled light pulses.