Designed and developed a variety of proof of concept projects to demonstrate the effectiveness of new encoder protocol interfaces, emphasizing efficient firmware and application design.
Collaborated with encoder manufacturer engineers to resolve 5 major test cases based on emulator error injection in HDSL encoder protocol, resulting in the successful certification of HDSL solution in TI SOCs.
Enhanced functionality by incorporating a 4 channel TDM capability into the TI McASP (multi-channel audio serial port) I2S emulation on PRU-ICSS.
Embedded Software Engineer
Texas Instruments
Bengaluru
07.2022 - 01.2024
Integrated software SDK release into internship work.
Performed detailed code reviews to uphold code quality, resulting in a reduction in post-release bug reports.
Acquired expertise in HDSL and EnDAT encoder protocol interface, extensively utilized in robotics and industrial communications.
Enhanced scalability of HDSL interface, enabling support for single to multi-channel (up to 6 channels per ICSS module) and expanded PRU core clock frequency from 225 MHz to 300 MHz
Reduced firmware IMEM footprint for HDSL interface by 25% through code optimizations and utilization of additional lookup tables.
Took ownership of and supported customers for HDSL, Tamagawa, and EnDAT encoder protocols.
Consistently integrated quarterly SDK releases.
Mentored new hires and interns in encoder protocols, including EnDAT 2.2 safety up to SIL-3 level utilizing SPI interface.
Created and executed comprehensive project plans for interns, ensuring timely project completion.
Showcased new development to the entire software team through live demonstrations.
Embedded Software Engineer Intern
Texas Instruments
Bengaluru
01.2022 - 06.2022
Developed a 32-bit RISC PRU implementation to emulate the Tamagawa interface protocol for position sensing encoders within the ICSS module of TI Sitara AM24x/AM26x/AM64x SOCs.
Experienced in creating ARM CORTEX R5F applications, designing driver API layers, and developing PRU firmware.
Increased efficiency and reduced costs by implementing programmable IPs in place of FPGAs.
Improved Scalability in terms of baud rates from 2.5 Mbps to 16 Mbps, single to multi-channel (6 channels per ICSS module) support, ability to support all custom UART protocol with variety of frame formats.
Implemented GUI interface for motor position sensing by utilizing multiple Tamagawa encoders.
Gained expertise in various aspects including reading board schematics, debugging techniques, hardware setup creation, firmware design as well as driver and application architecture development
Education
MTech - Compter Science
Netaji Subhas University of Technology (NSUT)
New Delhi
06-2022
Bachelor's of Engineering (B.E) - Computer Science And Engineering (CSE)