Summary
Overview
Work History
Education
Skills
Accomplishments
Place
Disclaimer
Client Demographic
Personal Information
Timeline
Generic

Rakshith G R

Bangalore

Summary

Dynamic Principal Application Engineer with extensive experience, excelling in Verilog and UVM. Proven track record in driving technology adoption and enhancing productivity through strategic performance tuning. Recognized for leadership in cross-functional teams and effective debugging methods, fostering strong client relationships to secure critical business opportunities.

Overview

11
11
years of professional experience

Work History

Principal Application Engineer

Synopsys
Bengaluru
11.2024 - Current
  • Overseeing simulation, static, and formal teams across India and Penang for Intel.
  • Functioned as trusted advisor for vital projects, supporting new deployment initiatives.
  • Guiding methodology discussions to tackle productivity problems and maximize efficiency.

Sr. Staff Application Engineer

Synopsys
Bengaluru
12.2023 - 11.2024
  • Promoted ICO usage and executed PoC campaigns for VSO.ai, strengthening Synopsys' position in front-end technologies at Intel.
  • Served as primary PoC for all simulation and debugging initiatives at Intel.
  • Conducted competitive replacement at Dmatrix, securing critical business opportunities.

Staff Application Engineer

Synopsys
Bengaluru
12.2022 - 12.2023
  • Acted as lead to drive critical support and deployments across all Intel groups.
  • Assumed role of Worldwide Performance lead, focusing on field inputs for VCS features.

Sr. Application Engineer -2

Synopsys
Bengaluru
12.2020 - 12.2022
  • Established role as single point of contact for critical projects at Intel, facilitating technology adoption to enhance productivity.
  • Mentored new team members to accelerate ramp-up and support of essential engagements.
  • Drove performance tuning and deployment initiatives, earning trust as an advisor for customers.
  • Executed deployment of multiple Apex technologies, increasing customer retention against Synopsys tools.

Sr. Application Engineer -1

Synopsys
Bengaluru
08.2019 - 12.2020
  • Supported major customer in simulation and debug technologies upon joining.
  • Owned multiple groups, driving new technology deployments and performance tuning initiatives.
  • Established strong rapport with customers to enhance collaboration.
  • Deployed effective solutions and utilities to boost customer productivity and integration with Synopsys tools.

Verification Technologist / Sr Product Engineer

Mentor Graphics
Bengaluru
02.2018 - 08.2019
  • Served as primary point of contact for field-related critical issues.
  • Collaborated with R&D and field teams to prioritize development of essential features.
  • Drove competitive displacements and simulation-based defense campaigns, ensuring effective competition management.
  • Developed glue scripts and utilities to facilitate user-friendly, push-button solutions.

Application Engineer -2

Mentor Graphics
Bengaluru
07.2017 - 02.2018
  • Led significant deployments and provided essential support for simulation and debugging initiatives.
  • Oversaw a major account focused on simulation and debugging, driving operational success.
  • Cultivated low power simulation expertise, guiding multiple customers through methodologies.
  • Secured Questa's market position via performance optimization and deployment of new technologies.

Application Engineer -1

Mentor Graphics
Bengaluru
07.2015 - 07.2017
  • Developed expertise in Formal technologies to address customer demands efficiently.
  • Collaborated with multiple customers as field application engineer, emphasizing reactive support and deployments.

Associate Application Engineer

Mentor Graphics
Bengaluru
07.2014 - 07.2015
  • Ramped-up of SV and UVM for enhanced performance.
  • Resolved customer issues through ticketing, establishing a robust technical foundation for debugging.
  • Collaborated with various customers and environments to conduct simulation debugging and performance tuning.

Education

B.E. - Electronics and Communication

VTU
Bengaluru
07-2014

Skills

  • Verilog, SystemVerilog, and UVM proficiency
  • Low power design methodologies
  • Formal verification technologies
  • Static analysis and linting
  • Design optimization strategies
  • Test case isolation
  • Coverage closure techniques
  • Regression management and development

Accomplishments

  • Multiple customer delight awards were received for collaborating with various teams at Intel
  • Individual excellence award for driving performance campaigns across Intel

Place

Bangalore, KA, India

Disclaimer

I hereby declare that the information furnished above is true to the best of my knowledge.

Client Demographic

  • Intel
  • Qualcomm
  • ARM
  • Mediatek
  • Microchip
  • Cypress SemiConductor
  • APM (Applied Micro)
  • Xilinx
  • Mil-Aero
  • AI based Chip production

Personal Information

  • Father's name: Rangaswamaiah
  • Mother's name: Sumangala K. R.
  • Date of Birth: November 22, 1992

Timeline

Principal Application Engineer

Synopsys
11.2024 - Current

Sr. Staff Application Engineer

Synopsys
12.2023 - 11.2024

Staff Application Engineer

Synopsys
12.2022 - 12.2023

Sr. Application Engineer -2

Synopsys
12.2020 - 12.2022

Sr. Application Engineer -1

Synopsys
08.2019 - 12.2020

Verification Technologist / Sr Product Engineer

Mentor Graphics
02.2018 - 08.2019

Application Engineer -2

Mentor Graphics
07.2017 - 02.2018

Application Engineer -1

Mentor Graphics
07.2015 - 07.2017

Associate Application Engineer

Mentor Graphics
07.2014 - 07.2015

B.E. - Electronics and Communication

VTU
Rakshith G R