Highly motivated Design Emulation Engineer with 5 years of Experience on VLSI chip Design and Verification. Adept multi-tasker who thrives in a high-pressure work environment. collaborative team player with proven track record.
Expertise OnVarious Emulator Platform like ZeBu/Palladium/Velloce
Expertise On Hybrid Emulation Platforms like Virtualizer Studio(Synopsys) and Helium(Cadence)
Good Knowledge on developing and integrating Virtual model of various IPs used inhybrid Emulation Platform
Experience in integrating Transactor and Acceleration VIPs and perform co‑emulation
Good understanding of the ASIC and FPGA design Flow
Good Understanding on Arm Based SOC Architecture
Good understating on AMBA Bus Protocol AXI, Ace‑Lite, AHB, APB etc
Good Knowledge on HDL languages Like Verilog, System Verilog
Good RTL debugging skill