Summary
Overview
Work History
Education
Skills
Certification
Affiliations
Accomplishments
Languages
Timeline
Patents
Rushikesh Shinde

Rushikesh Shinde

Pune

Summary

Lead Hardware Design Engineer with over 6 years of experience in embedded and power electronics systems for EV/HEV platforms. Proven success in leading full-cycle hardware development for traction motor controllers, BMS, DC-DC converters, ADAS-BSD, and ISG systems. TÜV SÜD–certified in ISO 26262 Functional Safety (Level 1), with hands-on application of DFMEA, FTA, DFA/DFM, and value engineering. Delivered innovative, production-ready solutions with up to 18% BOM cost savings. Proficient in system architecture, Altium-based PCB design, and EMC-compliant hardware, aligned with ISO 21780 and ISO 16750. Strong in customer collaboration, cross-functional leadership, and mentoring teams to drive quality, performance, and cost-effective outcomes.

Overview

7
7
years of professional experience
1
1
Certificate

Work History

Lead Center of Competency (CoC) Engineer

Varroc Engineering Ltd
Pune
10.2019 - Current

Key Projects & Product Ownership:

  • Traction Motor Controllers (TMCU): 48V–400V, 1.2 kW–70 kW platforms
  • Battery Management Systems (BMS): 14s–120s (48V–400V), Li-ion (LFP/NMC), with safety compliance
  • Isolated DC-DC Converters: 96V systems, 120W–240W, thermally compact design
  • Blind Spot Detection (ADAS-BSD): 76–81 GHz radar, 120° FoV, two-wheeler integration
  • Integrated Starter Generator (ISG): 12V–48V, 300W–1.5 kW, for 2W/3W mild hybrid systems

Key Responsibilities:

  • Project Lead – Hardware Systems: Drove end-to-end product development – from requirements engineering, through design, testing, validation, and mass production.
  • Cost Optimization Initiatives: Led platform-wide BOM cost reduction and component reusability efforts, achieving up to 18% cost savings across TMCU and BMS programs through value engineering and layout consolidation.
  • Design Ownership and Reviews: Managed schematic creation, simulation reviews, and design sign-offs. Oversaw EMC strategy, PCB stack-up, and key supplier evaluations. Conducted design risk assessments using DFMEA, FMEA, FTA, DFA, DFM, and the Pugh Matrix.
  • Testing and Validation Oversight: Conducted unit-level, subsystem, and full product testing, including dyno-based testing for traction and ISG units.
  • Certified Functional Safety Engineer, proficient in ISO 26262-compliant hardware development.
    PCB layout design, including stack-up definition, return path optimization, EMI/EMC compliance, and specification drafting.
  • Ownership of Build-to-Print (BTP) product lines – managing technical deliverables, responding to RFQs, and E-BOM finalization.
  • Plant Support: Supported production ramp-up, EOL testing, and burn-in test infrastructure development.
  • Mentoring & Technical Development: Mentored new graduates, interns, and team members on technical topics and project workflows.
  • Cross-functional Collaboration: Collaborated closely with cross-functional teams (mechanical, software, controls, thermal) to ensure the timely delivery of integrated system solutions.

Hardware Engineering Intern

Persistent Systems
Pune
07.2018 - 07.2019

Key Projects:

  • Brain-Computer Interaction (BCI) Project:

Key Responsibilities:

  • Interfaced and acquired EEG signals using EMOTIV Insight for real-time brainwave monitoring
  • Designed and co-patented a custom 21-channel EEG acquisition device (Indian Patent No. 540976)
  • Suggested method for interfacing BCI system with smart devices, including smart glasses and smartphones.
  • Enabled actuation of vehicle functions (turn signals, horn, ignition) via neural commands.

Education

Master of Technology - Automotive Electronics

Birla Institute of Technology And Science, Pilani, Pilani
07-2025
  • GPA: 9..06

Bachelor Of Engineering - Electronics and Telecommunication Engineering

Maharashtra Institute Of Technology, Pune
06.2019
  • Secured 1st Rank throughout all 4 years
  • GPA: 9.27

Skills

  • ISO 26262 – Functional Safety Certified (Level 1, TÜV SÜD)
  • Power electronics – Inverters, Converters
  • Altium Designer – Schematic and PCB design
  • LTSpice, TINA-TI
  • Design reviews and technical documentation
  • Analog and digital electronics
  • Embedded systems
  • Customer interaction
  • DFA, DFM – Manufacturability & Assembly
  • DFMEA, FMEA, FTA, Pugh matrix
  • Process and PLM tools – Windchill, BOM management
  • System and hardware architecture design
  • Cross-functional collaboration
  • Automotive standards – AIS 004, ISO 21780, ISO 16750
  • Cost optimization – VA/VE, reusability
  • Can tools – Vehicle Spy, CANoe, PCAN
  • Debug tools – Lauterbach TRACE32, TI CCS

Certification

  • Functional Safety Engineer - Level 1 - TÜV SÜD: Credential ID IN/23282/242816 based on ISO 26262:2018, 2nd edition (Road Vehicles - Functional Safety)
  • KPIT - Certification of Merit: Credential ID INSPRKL19006021

Affiliations

  • DC-Link capacitor dimensioning with lifetime calculation considerations for PMSM drives: a practical framework for enhanced performance, IEEE PECTEA International 2025, 2025-07-16
  • Analysis of back-EMF protection strategies for PM synchronous motor-based 2W/3W electric vehicles, WCX, SAE World Congress, SIAT 2025, 2025-04-01
  • Analysis of semiconductor-based pre-charge and cut-off circuits for 2W/3W electric vehicle battery management systems, SAE International SIAT 2021 - ARAI in association, 2021-01-01
  • Recurrent neural network-based classification of EEG for brain-computer interfaces, IJAECS International, January 1, 2019

Accomplishments

  • VARROC’s ‘Shabash’ Award – Twice recognized for outstanding performance and contribution
  • Science Plus Excellent Paper Award, June 2019
  • KPIT Sparkle Top project in India, January 2019
  • DRDO: DRUSE 1st rank in the South Division, January 2018

Languages

Marathi
First Language
English
Proficient (C2)
C2
Hindi
Proficient (C2)
C2

Work Type

Full Time

Work Location

On-SiteRemoteHybrid

Timeline

Lead Center of Competency (CoC) Engineer - Varroc Engineering Ltd
10.2019 - Current
Hardware Engineering Intern - Persistent Systems
07.2018 - 07.2019
Birla Institute of Technology And Science, Pilani - Master of Technology, Automotive Electronics
Maharashtra Institute Of Technology - Bachelor Of Engineering, Electronics and Telecommunication Engineering

Patents

  • A SYSTEM AND A METHOD FOR PERFORMING A USER ACTIVITY USING AN ELECTROENCEPHALOGRAM (EEG), IN201921011129: Granted June 6, 2024, Patent No: 540976
Rushikesh Shinde