Sagar T S
Banglore
Summary
6 Years of expertise in Firmware test development, application driver development for UFS and S2MS, Test framework development, several verification and validation domains (including Pre-silicon, Post-silicon, Characteristics, Power-Performance-Latency , Firmware, Hardware, and Storage Validation).
Overview
6
6
years of professional experience
Work History
Senior Engineer, Firmware Engineering
Western Digital(Sandisk India Device Design Centre pvt ltd)
Bangalore
2022.10 - Current
- Function Owner for DVT, Performance, Latency, Power, and Reliability in Firmware verification
- Pre Silicon, Post silicon verification, Power Performance and Latency Verification
- DVT, FVT, and Reliability Firmware Verification by qualifying new NANDFlash and ASIC products (UFS/S2MS).
- Development of the NAND-Subsystem Architecture and Test Framework
- Development of a Test Framework for FPGA-Based Customized Single Board Computer Solutions
- Test Design, Test development for embedded firmware
- Conduct statistical analysis of reliability metrics
- Pre silicon Firmware Test development on FPGA (HABS70/HABS100)
- Perform characterization, power, performance and latency assessments
- Benchmark according to JEDEC standards and product functional requirements (Polarian)
- Python is used in the development, test planning, integration, and execution of OptiNAND/eHDD products (UFS/S2MS)
- Conduct code review, qualification report analysis, and mentorship
- Configure DevOps Lab Infrastructure Combining NAND characterization, Blade servers, Thermal Chambers, Automation, Visualization, and Logging Platforms with Jenkins
- A professional SAFe team member is in charge of implementing agile development approaches
- Skills - DVT, FVT, Reliability, Power performance latency, Python, DevOps, Automation, Framework Development, PowerBI, Jenkins, Hardware design.
Engineer, Firmware Engineering
Western Digital(Sandisk India Device Design Centre pvt ltd)
2020.10 - 2022.09
- Developed Test Firmware unit case and front-end commands for UFS
- Development of Test on Customized SBC(Single Board Computer), FPGA based solutions
- Design, Code & Test for embedded firmware, Statistical Analysis of Reliability Metrics based on JEDEC and product functional requirements(Polarian)
- OptiNAND firmware reliability was established from scratch
- Function Owner of Firmware Reliability Test Planning, Development, Integration & Execution using Python for OptiNAND/eHDD
- Setup Lab Infrastructure with DevOps Integration of Jenkins, Automation, Visualization and Logging Platforms with Thermal Chambers, Blade Servers, NAND Characterization, and Firmware Debugging
- SAFe team member professional responsible for practicing agile methodologies for development
Post Silicon Validation, Test Engineer
Randstad India pvt limited
2018.08 - 2020.09
- Company Overview: (Client:Western Digital)
- Worked in higher dynamic environment on embedded NAND of 128Gb, 256Gb and 512Gb technology (BICS3, BICS4, BICS4.5 BICS5), qualifying eMMC and UFS storage devices by performing Endurance/ Oxide Degradation Test, Data Retention, Disturb Related Test and Temperature Instabilities Test
- Qualified products - Condor BICS3 (Mobile and Connected home), Macaw BICS4 (Mobile, Automotive, Industrial and commercial), Macaw plus BICS4.5 (Mobile, Automotive, Industrial and commercial), Swift Pro BICS4.5 (Mobile), BICS5 Regression and Reliability test verification of Firmware
- Setup Lab Infrastructure with DevOps Integration of Jenkins, Automation, Visualization and Logging Platforms with Thermal Chambers, Blade Servers, NAND Characterization, and Firmware Debugging
- Designed and Maintained lab infrastructure, analyzed PCB schematic and resolved the setup related issues, Reported and tracked issues (JIRA), did the needful debugging and FA
- (Client:Western Digital)
Education
Bachelor of Engineering - Electronics And Communication Engineering
Dayananda Sagar Academy of Technology And Mgmt
Bengaluru, India2018-07
P.U.C - PCME
Alva's PU College
Mudbidri2014-03
SSLC - Karnataka State Board
Chethana Vidya Mandira
Tumkūr, India2012-03
Skills
- Protocols : UFS, S2MS, eMMC, SPI and UART
- iNAND Floating gate technology (3D-NAND
Flash) - Verification : Pre Silicon (HABS70/100) & Post silicon Verification, Power performance & latency
- Development (Python) : Application driver development for UFS and
S2MS, Firmware Test Development & PCB Design - Validation : Post Silicon, Firmware Validation, System validation, Framework, Reliability & Hardware Validation
- Function Owner : DVT, Performance, Latency, Power, and Reliability
Accomplishments
- Optimized regression testing efforts through continuous improvement of test cases and methodologies
- Patent submission for SDR Alternative
- Patent submission for SDD - Serial Debugger Diagnosis
- Patent submission for Novel Validation Strategy for Remote Power Cycle
- Patent submission for design of SAS/SATA Adapter
Tools
- Instruments used - Thermotron/ CME/ Tenny (environment Chambers), DMM, Clamp meter, Oscilloscope, Pico-logger, SDR, EVB, Card readers, IDLT, Supermicro, PCBA and Lambda power supply.
- Software Tools - Multi, Jenkins, Jfrog(Artifactory), Gerrit, Bitbucket, JIRA, Confluence, PyCharm, Visual Studio, FTMS, Niagara, Kong, FAR, Scripter |||, SanDisk Insight, Emonitor, Teletron, Clear, X plorer, ACE, Beyond Compare, Office 365, Nano NT, Atmel studio 7, Proteus Design Suite, Easy EDA, Visual Studio and Astra NT.
Timeline
Senior Engineer, Firmware Engineering
Western Digital(Sandisk India Device Design Centre pvt ltd)
2022.10 - Current
Engineer, Firmware Engineering
Western Digital(Sandisk India Device Design Centre pvt ltd)
2020.10 - 2022.09
Post Silicon Validation, Test Engineer
Randstad India pvt limited
2018.08 - 2020.09
Bachelor of Engineering - Electronics And Communication Engineering
Dayananda Sagar Academy of Technology And Mgmt
P.U.C - PCME
Alva's PU College
SSLC - Karnataka State Board
Chethana Vidya Mandira
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