SAHITHYA JAMALPUR
Hyderabad
Summary
Experienced Software Engineer with over 6 years in C/C++ development throughout the SDLC, specializing in kernel development, graph compiler design, and performance optimization for CNNs, DNNs, and LLMs on GPUs. Expertise in parallel programming, assembly language, and GPU workload management, complemented by hands-on experience in Linux and Windows systems, Agile methodologies, and AI inference workloads.
Overview
6
6
years of professional experience
Work History
Senior Software Engineer
Blaize (ThinCI Semiconductor Technologies India Pvt. Ltd)
Hyderabad
04.2025 - Current
- Identified and fixed graph compiler correctness issues and debugged nan outputs in the CCT model by tracing a cache-padding problem on tensors feeding transpose/matmul ops; validated the fix with virtual tensors.
- Investigated fps regression in YOLOv9s-MIT and YOWOv2, identified lost OD to 1D promotion transforms that routed gather onto a slower CLC path, and added HASM gather kernel support to restore baseline performance.
- Restored functionality by fixing Qwen2.5 kernel assembly failure by tracing gather-node fusion into RotaryEmbedding kernels with mismatched register layouts, then added regression tests and restored inference without tensor parallel.
- Fixed Qwen2.5 output mismatch from register reuse conflicts in FP8 dequantization matmul kernel by adding dedicated cast register and restoring correct transcript output.
- Improved graph-level SDK path by replacing pow(x^2) with mul(xx) for static exponent-2 cases, reducing per-node latency from 109us to 71us across ViT and YOLOv7.
- Expanded ONNX matmul support to 9 mixed f16/bf16/f32 input-output combinations for GGML precision needs, streamlining dequantized matmul by removing unnecessary register shuffling.
- Reduced divide(z-broadcast) kernel main-register usage from 17 to 16 through register-allocation tuning while keeping full test coverage.
- Improved bfloat16 matmul for mixed-rank inputs in ONNX SGraphs, delivering ~29–34% end-to-end performance gains on ABINet and Sphere-Ax-VLM.
- Root-cause LightGlue hardware assertion failure to DMA transfer exceeding 65535-element width limit; confirmed as hardware constraint without software workaround.
- Optimized bfloat16 MatMul for mixed-rank inputs in ONNX graphs, achieving ~29–34% end-to-end performance improvement on ABINet and Sphere-AX-VLM.
Software Engineer I & II
Blaize (ThinCI Semiconductor Technologies India Pvt. Ltd)
07.2020 - 04.2025
- Built a C++ graph compiler framework to optimize DNN models such as ResNet, GoogLeNet, YOLO, and MobileNet for GPU through node fusion, buffer optimization, and node elimination, reducing redundant load and store operations and improving execution efficiency.
- Optimized CNN convolution and matmul kernels with SIMD across YOLOv4, CONTI models, and ResNet-50, improving performance and lowering power usage.
- Led ONNX operator bring-up from frontend to backend, by generating SIMD kernels based on tensor size.
- Created framework to generate SIMD kernels at runtime for each graph node.
- Automated ONNX frontend generation through Cogall script, normalizing all operator versions to the latest signature before applying Perflibs optimizations.
Education
M.Tech - Artificial Intelligence
University of Hyderabad
Hyderabad07-2020
B.Tech - Information Technology
JNTUHCEJ
Jagtial06-2018
Intermediate -
Vagdevi Junior College
Hanumkonda06-2014
Secondary School Certificate (SSC) -
Adarsha High School
Jayshankar Bhupalpally07-2012
Skills
Programming: C, C, Assembly
(SIMD), Python
Domain & AI Stacks: Graph
Compilers, LLM Inference,
CNN/DNN Optimization, ONNX
Operators, Quantization,
Operator Fusion
Systems & Tools: Linux,
Windows, Git, SDK Development,
Performance Profiling &
Regression Analysis, MS Office
Core Subjects: Deep Learning,
Machine Learning, LLM
Inference, Parallel Computing
Academic Project
Community Detection in Social Networks using Deep Learning, 2019 - 2020, For the problem of community detection in a unipartite network, proposed an improved method using 2-layer autoencoders and the k-means clustering algorithm., The network's matrix representation was given to the autoencoders to obtain a lower-dimensional network matrix representation., k-means clustering was applied to group similar nodes of the network together., Network modularity was calculated to evaluate the results.
Awards & Professional Achievements
Spot Award for successful ONNX unary and binary operator bring-up from frontend to backend in Blaize SDK perflibs library on Blaize v1p, improving performance of various networks., Spot Award for ONNX MatMul operator variants bring-up and optimized kernel design for MatMul 2D operator, improving Tiny-ViT network performance., Spot Award for modifying Blaize library operators to make different versions compatible with each other.
Timeline
Senior Software Engineer
Blaize (ThinCI Semiconductor Technologies India Pvt. Ltd)
04.2025 - Current
Software Engineer I & II
Blaize (ThinCI Semiconductor Technologies India Pvt. Ltd)
07.2020 - 04.2025
M.Tech - Artificial Intelligence
University of Hyderabad
B.Tech - Information Technology
JNTUHCEJ
Intermediate -
Vagdevi Junior College
Secondary School Certificate (SSC) -
Adarsha High School