Summary
Overview
Work History
Education
Skills
Soft Skills
Accomplishments
Academic Projects
Extracurricular and Cocurricular Activities
Certification
Websites
Languages
Hobbies
Timeline
Generic
Sai Rohith  D S

Sai Rohith D S

Bengaluru

Summary

Passionate and detail-driven layout engineer with over 2 years of hands-on experience in advanced CMOS technology at Texas Instruments. Seeking to leverage proven expertise in high-performance memory layout, top-level verification, and mask-level design rules in a challenging Mask Design Engineer role at NVIDIA.

Overview

2
2
years of professional experience
1
1
Certification

Work History

Analog Layout Design Engineer

Texas Instruments
Bengaluru
05.2023 - Current
  • Led the layout design of high-performance NVM macros (OTP, EEPROM, Fuse ROM) using advanced CMOS nodes (28 nm).
  • Executed layout designs for OTP WLRs and EFuse WLRs across various TI technology nodes.
  • Developed HVGEN layouts from scratch to generate internal power for memory systems in different TI technology nodes.
  • Developed layouts for bitcells, decoders, sense amplifiers, optional circuits, Iref blocks, and control blocks of various NVM memory types, maintaining device symmetry, matching, and signal shielding best practices.
  • Collaborated with the circuit design and EDA teams to ensure layout quality, timing, and functionality.
  • Performed block-level floor planning, routing, and macro-level assembly of memory components; executed EM/IR analysis, Layout Dependent Effect (LDE) checks, including LOD, Dummification, Dummy Fill, and antenna rule coverage.
  • Used industry-standard tools: Cadence Virtuoso, Assura/Calibre, PEX/DRC/LVS, and Mentor Calibre for sign-off
  • Delivered 100% DRC/LVS clean layouts on schedule, contributing to 3 tape-outs in 2 years

Education

B.E - Electronics & Communication

JSS Science & Technology University
Mysore
01.2023

Class XII -

FIITJEE Junior College
Hyderabad
01.2019

Class X -

Montessori Indus
Kurnool
01.2017

Skills

  • EDA tools: Cadence Virtuoso, Calibre, Assura, PVS, ICC2
  • Verification: DRC, LVS, PEX, EM/IR, antenna checks
  • Layout techniques: symmetrical layout, signal shielding, matching devices
  • Process knowledge: layout-dependent effects (LOD, WPE)
  • Memory types: OTP (trim, trim array, HDA), fuse ROM, EEPROM, MTP
  • Programming/scripting: skill, TCL, basic C/C
  • Professional skills: layout design, memory macros, block-level floor planning, electromigration analysis, DRC/LVS sign-off, device matching, tool automation, analog simulation, floorplanning techniques, EMI shielding techniques
  • Simulators: Cadence (Virtuoso), CoppeliaSim, Proteus, LabVIEW, SciLab, MATLAB

Soft Skills

  • Excellent team collaboration with cross-functional teams (Design, DFT, Verification)
  • Detail-oriented approach to DRC/LVS closure
  • Strong documentation and communication skills

Accomplishments

  • Achieved first-pass silicon success in three tape-outs over two years
  • Presented an internal workshop on the HVGEN function and its workings, and ways to improve the quality of layout design in advanced nodes
  • Presented an internal tech session about HDA, OTP, NVM (my first tape-out success)

Academic Projects

BrainComp Interfacing

▪ Created an application for detecting pain signals in the brain of a patient undergoing operation. 

▪ Developed a software simulation prototype using C Language in Keil software. 

▪ Built an interface using 8051 Microcontroller, 5th order butterworth filter and 16 * 2 LM016L LED.

Berryminator (IIT-B EYRC)

  • Developed an Automated simulated bot for collecting and storing berries of different trees and shrubs.
  • Designed a robotic arm using CoppeliaSim and Fusion 360 designing software
  • Built a real-time detection system for the identification of berries using Python and its modules

Fire AlarmSystem using Node MCU (IOT)

  • Built aFire AlarmSystemthatwilldetectthe unwanted presence of fire by using Node-MCU.
  • Microcontroller is main control chip, and the remote alarming and data exchanging are achieved using GSM mod.
  • Interfaced microcontroller with GSM, Flame Sensor, Buzzer and LCD

Grouping of colored brain data to trigger device mechanisms. (FYP)

  • Low-costEEG data capture by reducing the measurementpointbased on application.
  • Establishing wireless communication between the EEG systemand the vehicle to be controlled.
  • Controlling the motion of a vehicle based on the color determined by EEG analysis.

Extracurricular and Cocurricular Activities

CO-CURRICULAR: 

  • Published and presented an IEEE paper on the Brain Computer Interfacing Application under the guidance of Mrs. Anitha S Prasad
  • Conducted a seminar on the implementation of biometric processing using a DSP kit under the guidance of Mrs SUJATHA KUMARI.
  • Secured 3rd runner-up in the 8th National Abacus Competition, achieved a Grade IV certification EXTRACURRICULAR:
  • Received a scholarship of INR 1.0 lakh as part of SSB Railway Scheme.
  • Secured a Level 2 certification in the Australian National Chemistry Quiz 2015
  • Received a certification in VLSI ESim Marathon organized by FOSSEE (IIT B) in 2021
  • Represented the institution in cricket as part of the zonal sports meet in 2015
  • Served as one of the house captains of Montessori Indus in 2015-16
  • Social Endeavors: Headed a donation drive with 150+ students across Kurnool district raising upward of ₹2,50,000. Organized book recalls for blind people by gathering 80+ school students from nearby schools. Surveyed and collected the data of HIV-infected children and mothers, organized health camps.

Certification

  • 2021 VLSI hardware design (FOSSEE)
  • Paper publication on BrainComp interfacing (IEEE)
  • Berryminator (Eyantra)
  • 4.0 Tech 101 Certificate (NXT Wave)

Languages

Kannada
First Language
Telugu
Proficient (C2)
C2
Tamil
Advanced (C1)
C1
English
Proficient (C2)
C2
Hindi
Advanced (C1)
C1

Hobbies

  • Music
  • Sports (cricket, badminton)
  • Trekking
  • Linguist

Timeline

Analog Layout Design Engineer

Texas Instruments
05.2023 - Current

B.E - Electronics & Communication

JSS Science & Technology University

Class XII -

FIITJEE Junior College

Class X -

Montessori Indus
Sai Rohith D S