Passionate and detail-driven layout engineer with over 2 years of hands-on experience in advanced CMOS technology at Texas Instruments. Seeking to leverage proven expertise in high-performance memory layout, top-level verification, and mask-level design rules in a challenging Mask Design Engineer role at NVIDIA.
BrainComp Interfacing
▪ Created an application for detecting pain signals in the brain of a patient undergoing operation.
▪ Developed a software simulation prototype using C Language in Keil software.
▪ Built an interface using 8051 Microcontroller, 5th order butterworth filter and 16 * 2 LM016L LED.
Berryminator (IIT-B EYRC)
Fire AlarmSystem using Node MCU (IOT)
Grouping of colored brain data to trigger device mechanisms. (FYP)
CO-CURRICULAR: