SAI SINDHUJA YARAJENA

Roles and Responsibilities:

• Requirement analysis and implementation of the design using hardware description languages such as verilog, systemverilog as per the specifications of the digital IP. Creating detailed documentation for digital IPs owned.
• Debugging and fixing of functional issues found during verification.
• Integrating individual IPs into Soc design.
• Analysis of LINT, RDC at Soc level.

Digital IPs owned:

• Firewall: Access control block
• Crypto: A sub system integrated with assymetric and symmetric crypto blocks
• EMFI detectors: 2 Fully hardware IPs to detect electro magnetic field injections. These IPs provide protection against attacks on the IC.
• Security protection mechanisms were implemented in critical digital blocks for added protection.
• Codepatch: Mechanism to override the ROM read data.
• CRC: Cyclic redundancy blocks

• 6 months experience at NXP Semiconductor as intern. Created spyglass dft setup for all the digital blocks in the Soc and presented to the entire digital design team.