SAMBHAV KESHARI

OPAMP-VREF Project:

• Designed 1 MHz UGB opamp with 7-bit hybrid DAX for offset trimming, achieving 0.5mV target spec.
• Optimized gm linearization for rail-to-rail input stages to enhance opamp performance across input ranges.
• Selected CTAT unit current for trimming, reducing offset drift across temperature variations.
• Divided n-bit hybrid DAC into m-bit binary and (n-m) bits thermometric for target specs.
• Designed folded cascode high gain 2-stage opamp with Miller compensation for 1-pole UGB stability.
• Contributed to optimizing the temperature coefficient of the Bandgap reference design by evaluating its architecture.

Problems Faced, Debugged and Refined:

• Resolved ringing in silicon due to +ve PSR at bandgap output and VREF by implementing a low-pass RC filter.
• Addressed missed load/line regulation spec by optimizing the bandgap circuit architecture.
• Refined the architecture of the reference buffer to enhance performance and meet design specifications.

• Characterized 180 nm IO/core MOSFETs, resistors and MIM capacitors for analog design projects.
• Designed a 5-pack single-stage OTA with 1.2 MHz UGB, 1-1.6V input common-mode range, achieving 36dB gain.
• Implemented and optimized constant gm biasing circuits for improved PSR and stability.
• Contributed to opamp trimming, DAC current selection and analog circuit simulations.