Sanjiv Kumar C.A
Physical Design Engineer
Chennai,TN
Summary
Skilled Physical design Engineer with 6.5yrs of experience, focused on achieving best PPA within tight schedules. Excellent project management abilities demonstrated by working with multi-site design teams, mentoring new-hires and successful 10+ smartphone SOC tapeouts.
Overview
16
16
years of professional experience
6
6
years of post-secondary education
2
2
Certifications
Work History
Staff Engineer
Mediatek Inc
Singapore
04.2014 - Current
- Experienced in implementation of digital macro/block/top designs having 1000's to ~4Million gates in various deep tech nodes i.e 28/16/10/7nm and scripting/automation using Perl/Tcl
- Proficient in Flat & Hierarchical design flows including floorplanning, P&R, CTS, ECOs using Synopsys ICC/ICC2 & Cadence Innovus tools.
- Ability to work independently and collaboratively on all levels from Block owner to Project Manager and exhibit complete ownership & dedication of tasks.
- Good hands-on experience on congestion prone 4G Modem designs to high speed AI processors (~1GHz) and in-depth understanding of multi-voltage, multi-power domain and low power MTCMOS techniques.
- Performed other PD activities like Timing analysis and closure using PrimeTime & Tweaker, Physical verification tasks using Calibre/ICV/Laker and IR drop analysis using Redhawk/Voltus.
Intern
Broadcom Inc
Singapore
07.2013 - 02.2014
- Completed Master thesis titled "Timing Optimization using Useful Clock Skew" for fixing timing violations by tuning clock skew during Timing Closure by TCL scripting
- Developed Perl automation scripts to parse 100's of PT STA reports, generate summary and email them to owners once run finished.
- Performed frontend RTL synthesis of ~500K gate STB block using DC and delivered data to PD on schedule with best PPA
Systems Engineer
Infosys Ltd
Chennai, India
07.2010 - 07.2012
- Skilled in Incident and Change management activities of HTML/JS based Web applications for top US retail corporation
- Resolved ~20+ incidents per day by conducting root cause analysis, documenting findings and expedite fixes through SQL DB/Scripting changes.
- Demonstrated excellent verbal and written communication skills necessary to work effectively with US client and customers.
Education
Master of Science - Integrated Circuit Design
Nanyang Technological University & Technical University Of Munich (NTU-TUM)
Singapore 07.2012 - 03.2014
Bachelor of Engineering - Electronics And Communication Engineering
M.N.M Jain Engineering College
Chennai, India 04.2006 - 04.2010
Additional Information
- Recognized with project awards for my valuable work on MTK's Helio X20 and Dimensity1000 4G/5G chips
- Won 3 Top prizes in Mediatek Innovation Week contests for building solutions based on MTK IoT kits
- Achieved ‘Rising Star Award’ for excellent project performance as a fresher at Infosys
- Awarded ‘The Best Outgoing Student’ of 2006-2010 during my BE undergraduate course
Certification
Computer Architecture & Acceleration for Machine Learning @ NTU, SG
Timeline
Operational Excellence @ SSIA, SG
09-2019
Computer Architecture & Acceleration for Machine Learning @ NTU, SG
03-2019
Staff Engineer
Mediatek Inc
04.2014 - Current
Intern
Broadcom Inc
07.2013 - 02.2014
Master of Science - Integrated Circuit Design
Nanyang Technological University & Technical University Of Munich (NTU-TUM)
07.2012 - 03.2014
Systems Engineer
Infosys Ltd
07.2010 - 07.2012
Bachelor of Engineering - Electronics And Communication Engineering
M.N.M Jain Engineering College
04.2006 - 04.2010