Summary
Overview
Work History
Education
Skills
Accomplishments
Affiliations
Certification
Timeline
Generic
Santhosh Dyavanapally

Santhosh Dyavanapally

Hyderabad

Summary

With over a decade of QA engineering expertise, I excel in crafting comprehensive test strategies and leading teams to achieve product excellence. My analytical prowess and successful management of complex QA processes are recognized across diverse domains, including Linux, system platform drivers, security, edge computing, and pre/post-silicon validation for IoT, Mobile Automotive, FPGA, and Avionics.

I am proficient in validating advanced technology products, from low-level firmware and device drivers to high-performance computing solutions. My skills in robust project management and automation frameworks streamline processes, enhance product quality, and ensure efficient software development, integration, and validation.

As a strong leader, I guide cross-functional teams, foster collaboration, and drive strategic resource management to achieve operational excellence throughout the software development lifecycle. I am committed to continuous improvement and innovation, delivering high-quality, customer-centric products that align with the evolving technological landscape.

Overview

10
10
years of professional experience
1
1
Certification

Work History

Senior Lead Software Engineer

Qualcomm Technologies
Hyderabad
11.2022 - Current
  • Led a cross-functional team of eight to establish formal QA processes. I ensured system quality through comprehensive testing and validation. I developed and implemented efficient test plans, oversaw execution, managed defect tracking, and ensured thorough documentation.
    My efforts in continuous improvement covered all aspects of the system, resulting in higher product quality, streamlined operations, and enhanced reliability.
    Designed and implemented a new automated testing framework, reduce manual test efforts & increasing test coverage by 40%.
  • Project 1 – Ensure the low-level system security (Trust Zone, secure boot, access control) of embedded software for ARM and RISC-based IoT and mobile chipsets, resulting in 100% robust security features for the system.
  • Pre-post silicon validation.
  • With RCA and TEA for customer issues, resulting in a 30% decrease in post-launch critical issues.
  • Project 2 – The Qualcomm 217 chipset is an IoT-optimized LTE modem with integrated positioning support for greater connectivity that requires power efficiency and a small form factor design, along with a cost-conscious design featuring a custom AWARE SDK.
  • Lead the team on real-time tracker device security and platform-level driver validation with sensors, GNSS, and ISIM technologies.
  • Project 3 – As part of QLI, I worked on an Advanced Edge Gateway solution (SRIOV, DPDK, Container, KVM-based) for substation merging units (SMUs) that facilitate communication between transformer equipment and control centers by seamlessly integrating these robust edge devices with high security, low latency, high-performance real-time kernel edge computation, and innovation.
  • E2E solution validation identifies the system-level load and latency, and captures KPIs.

Senior Software Engineer

AMD
Hyderabad
05.2018 - 10.2022
  • Leading a team of four, I am responsible for delivering a high-quality system software stack for Xilinx Versal, ZynqMP, Zynq, MicroBlaze SoC and SOM devices.
  • My focus areas include product acceptance, automation, validation, verification, and documentation.
  • Implemented quality standards & Automation that improved product release efficiency by 48%
  • Inter-processor communication with OpenAMP, Xen Hypervisor, FPGA Manager, and cryptographic algorithm validations.
  • High speed Ethernet IP validation (TSN, PTP, 10G, 25G, iperf3).
  • Vivado-based FPGA design development and testing, sharing designs for integration-level system validation. This enhances collaboration and accelerates the validation process, resulting in robust and reliable FPGA solutions.
  • Yocto based Peta Linux OS image building, verification & automation.
  • Developed Opensource Embedded device automation framework – ROAST.
  • Test application development, review & Git maintainer.

Senior Software Engineer

Mirafra Technologies
Hyderabad
02.2017 - 04.2018
  • Verification of ARM based FPGA devices with Petalinux.
  • Individual contributor in defining & driving Test strategy, Test planning, Test Infrastructure setup, Test Lab built up, Test framework, Test Automation, Test coverage, Resource allocation/alignment.
  • Collaborated with senior engineers to troubleshoot and resolve software issues.

Software Engineer

eInfochips
Pune
12.2014 - 02.2017
  • Experience in Verification & Validation and Automation in Automotive and Avionics Domain.
  • Quickly adopt to software life cycle, agile methodology, Code coverage.
  • System, Unit, Integration, Functional, Performance, black box, white box testing, pytest and various test methods to test applications, drivers and another kernel level modules/APIs.

Education

Bachelor of Engineering - Electronics & Communications

CMR College of Engineering & Technology
Hyderabad
08-2013

Skills

  • OS Environment : Linux, Baremetal, windows, RTLinux, FreeRTOS, Yocto, Android
  • Arch: ARMV8, RISCV
  • Coding Language: Python, Embedded C, shell script
  • SW stack : Bootloader, Device drivers, TrustZone, kernel, Hypervisor (Xen, KVM), uboot
  • Secureboot, Cryptography, DRM, Access control
  • SRIOV, DPDK, TSN, PTP, Ethernet, 10G, CAN, PCIE
  • Compliance: ISO26262, DO-178B, SDLC compliance, V&V, Agile
  • Testing: System, Integration, manual, Functional, stability, Pre-post silicon validation, HIL, SIL, Automation, Code Coverage, Verification & Validation testing
  • Docker, MQTT, webserver
  • Debugging, CI/CD
  • Generative AI, LLM inferencing, RAG
  • Automation: Pytest, ROAST
  • Version control: GIT, SVN
  • TOOLs: Vivado, SDK, DOORS, JIRA, Jenkins
  • Management: Project management, Resource management

Accomplishments

  • QA Automation Framework Cost Reduction Initiative: Acknowledged for developing a robust test automation framework, enhancing efficiency, and accuracy, reducing operating costs by 30%
  • Developed personalized Nutri sense app with Generative AI models for companywide AI buzz.
    Auto Code model usage for speedup automation & documentation.
  • Lead innovation & Process improvement across cross functional team resulting one idea receive patent protection.

Affiliations

Managed a team to successfully complete a project within the deadline by leveraging adaptability, continuous improvement, innovation, and problem-solving skills.

Certification

  • Program Management

Timeline

Senior Lead Software Engineer

Qualcomm Technologies
11.2022 - Current

Senior Software Engineer

AMD
05.2018 - 10.2022

Senior Software Engineer

Mirafra Technologies
02.2017 - 04.2018

Software Engineer

eInfochips
12.2014 - 02.2017

Bachelor of Engineering - Electronics & Communications

CMR College of Engineering & Technology
Santhosh Dyavanapally