Summary
Overview
Work History
Education
Skills
Websites
Timeline
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SANTOSH DN

Principle Engineer
Bangalore

Summary

  • Principle Engineer with 18+ years of extensive experience as Principle Engineer , LTEL1 and L1-L2 interfaces development, and leading a team of 5.
  • Adept in 3GPP LTE Release 8/9 stAndards (36.211, 36.212, 36.213, 36.321, and 36.331).
  • Extensive hands-on experience in the Physical and Mac layers of 3GPP LTE modules.
  • Hands-on expertise in C programming on TI and Free scale DSPs, and RTOSs like Smart DSP OS and DSP BIOS.
  • Skilled in issue resolution for various features reported by customers, providing valuable support during customer NodeB software upgrades.
  • Possess strong analytical and debugging skills, coupled with tools proficiency in Code Warrior and Code Composer Studio.
  • Familiarity with test equipment, including Aeroflex TM500, Keysight Simulator, Agilent MXA, and Azimuth Channel Emulator, Keysight VSG and MXG
  • Demonstrate people leadership by providing constructive feedback, and mentoring junior developers to foster team growth.
  • Highly effective in troubleshooting and resolving complex technical issues; recognized for providing technical leadership on impactful projects, while influencing a distributed team of engineers.
  • • Handled a team of 4-5 Engineers.

Overview

18
18
years of professional experience
5
5
years of post-secondary education

Work History

Principle Engineer

Tejas Networks India PVT LTD
04.2024 - Current
  • Developed Automation framework for the Uplink channel validation[PUSCH ,PUCCH, SRS] using the Keysight MXG tool[Keysight 7624C MXG].
  • Supported in the Board Bring-up and Validation of the new Hardware [QX100] for all the 5G Phy channels.
  • Developed Automation Framework for the Uplink channels for 5G using the Keysight VSG [ Pathwave tool 9484C] integrated with the Marvell DU.
  • Testing of Uplink pucch and pusch channels for different sweeps [ AWG, TXpower, MCS and RB].

SENIOR STAFF ENGINEER

Marvell Technologies
09.2022 - 03.2024
  • Streamlined the automation framework for 4G Uplink channels which helped in validation and documentation of the same.
  • Led the bring up and validation of Silicon (Different SOC [F105, THOR, LOKI]).
  • Validated range of IO interfaces and functions on multi-core ARM processors including DDR5, Ethernet, RFOE, PCIe, USB, and eMMC.
  • Conducted post-silicon validation for weekly SOC build and final monthly release to customer; identified issues and reported them to the DEV team.
  • Worked on FrontHaul Packet Forwarding Feature, including test plan, test case development, and automation and integration.
  • Streamlined SOC verification processes for various chips, ensuring systematic validation in every intermediate build to catch issues early.
  • Collaborated with automation engineers and successfully automated validation, achieving these improvements within 5 months.
  • In response to the absence of documentation for new joiners, initiated comprehensive documentation for each chip, completed, and made available within 2 months, facilitating smoother onboarding process.

SENIOR TECH SPECIALIST

Tata Elxsi Ltd.
09.2019 - 08.2022
  • Performed conformance testing for enhanced features of NR 5G NSA & SA scenario as per 3GPP standard.
  • Executed requirement analysis, feature testing and enhancement, issue analysis, and support for customers.
  • Tested new scripts for NR 5G NSA & SA scenario as per 3GPP specification for verifying expected scenario mentioned in specs.
  • Fixed Jira and HDI bugs as reported by customers.
  • Completed Build testing, and unit testing for enhanced features, along with regression and automation testing.
  • Led a team of 4 members, successfully delivering desired outcomes for each intermediate build released daily; added new test cases to Validation list in 5 months, overcoming geographical challenges and ensuring timely delivery to customers.

TECH SPECIALIST

Aricent Technologies
04.2016 - 07.2019
  • Led a team of 5 members to complete tests before released to customers.
  • Developed TCs from both enodeB perspective [AIQ[Vector Generation] to simulate enodeB and UE perspective [Scenario] to verify a feature for LTE Rel 13 eMTC[CATM1] specific.
  • Supported maintenance and bug fixing of issues raised internally and by customers.
  • Supported as a Development & RAV engineer; Frequency Hopping [PRACH, Paging, MPDCCH, and MPDSCH] and verified UPCIOT and CPCIOT Feature for REL13 CatM1 UEs.
  • Implemented CeModeA feature; Harq ACK delay feature for Half Duplex in HDD And Harq Ack Bundling for HDD for FDD.
  • Integrated Harq ACK delay feature for Half Duplex in HDD And Harq Ack Bundling for HDD for FDD.
  • Integrated CeModeB feature; NACC value-related changes for MPDSCH and MPUSCH and RACH NB-related changes, DCI Parsing, RAR Grant decoding for CEModeB.

SENIOR TECH LEAD

HCL Technologies Ltd.
Bangalore
02.2013 - 03.2016
  • Assisted board in bringing up activities for one of the chip set versions [ C0-7560].
  • Implemented minor features for HSDPA in layer 2.
  • Extended support for integration and system test teams by specifying test cases, and fixed issues on testing.
  • Performed Unit Testing in host and target environments.
  • Handled CRs (bugs) and queries raised from system test team, field trials, live network, and other sub-system teams.
  • Analyzed traces, warnings, and errors reported, PQ3 crash dump analysis, recreated scenarios from logs, stack analysis, and debugging in host and target environments.
  • Fixed and wrote root cause analysis reports, unit testing, regression testing, and delivery to global streams.

SENIOR TECH LEAD

Alcatel Lucent Technologies Ltd.
11.2012 - 01.2013
  • Importing entire HSDPA Module onto to new SOC-based Freescale DSP(MSC8156).
  • Rewrote portion of the code from FPGA or ASIC in current Alcatel Lucent hardware and ported it to new Freescale SOC-based processor for Light Radio(LR).

LEAD ENGINEER

Lekha Wireless
06.2012 - 10.2012
  • Developed Frequency offset and Timing offset generation and correction modules for WiMAX.

SENIOR SOFTWARE ENGINEER

Alcatel Lucent India Pvt. Ltd.
10.2010 - 05.2012
  • Provided design support for R99, HSDPA, and HSUPA modules; handled CRs (bugs) and queries, and DSP crashes.
  • Analyzed traces, warnings, and errors reported, DSP crash dump in CCS, re-formed scenario from logs, stack analysis, and debugging in host and target environments.
  • Optimized code by using Intrinsic, removing unwanted Tasks and loops thereby reducing Processing Overhead in code.
  • Migrated Core- 2 To Core-1 code in TI 6487 DSP [DSP was used in Asymmetric mode].
  • Created and executed random scenarios tests and radio tests with test mobile and channel emulators.
  • Designed and developed Uplink receiver Signal chain modules like Resource Demapping, channel estimation, Decoder, Demodulation, Descrambler, and CRC Check, ported the same on customized board, and integrated the framework.
  • Performed end-to-end testing with Aero Flex TM500 UE Simulator.

SENIOR SOFTWARE ENGINEER

Kyocera Wireless India Pvt. Ltd.
11.2007 - 09.2010
  • Developed Mac-Phy Stub for Testing Layer 1 Control Parameters; verified Layer 1 Uplink Parameters with UE Simulator.
  • Performed Interface Testing on customized board.
  • DSP framework design and implementation in TCI6487 processor for LTE with Downlink and Uplink processing is executed towards Multicore- multiprocessor environment; in multicore DSP architecture, one of the DSP (Master core) can be utilized to manage necessary control functions and distribution of available resources/tasks among remaining cores.
  • Conducted comprehensive design for task-based architecture and scheduling for LTE DSP software running on TI’s TCI6487 DSP platform.
  • Developed downlink and uplink scheduler with core-to-core communication using interprocessor communication interrupts and EDMA process; integrated downlink and uplink signal chain modules with scheduler framework code.
  • Created MAC stub with MAC DL and UL functionality and MAC-PHY Control Message and Data communication.
  • MAC-PHY interface with Downlink DSP->RRH->UE Simulator and UE->RRH->Uplink DSP->MAC Interface activity with testing and debugging.
  • Developed Downlink and Uplink HARQ processing framework, and Uplink TTI Bundling framework.
  • Tested Framework for different scenarios with signal chain; tested end-to-end system with UE simulator.
  • Integrated GUI and developed Physical Layer for LTE.
  • Interfaced for Multiple Frame generation between GUI and Physical layer code.

Education

Master of Science - Embedded Systems

Manipal University
Manipal, Udupi
08.2006 - 01.2008

B.E. - Electronics and Communication

SJCIT College Chickballapur
Chickballapur
09.2002 - 01.2006

Skills

LTE Framework Development for Physical Layer (Uplink and Downlink)

Integration of Layer1 and layer2 for LTE eNodeB

multi-core multi-DSP system [ TI-6487/88 Processor]

debugging

Agile Principles

LTE REL 13 & REL 14 CATm1[eMTC] specification

Testing of LTE ENB , 5GNR FR1 , 5GNR FR2 with real UE [Samsung/ Qualcomm] as well as with Keysight Signal generators

SOC QA validation on Marvell Chipsets [Loki, THOR and F105]

C, MATLAB, Python[basics]

TI Code composer Studio IDE, Freescale CodeWarrior, Clear Case (UCM), Source Insight, Code Collaborator, I runner [specific to INTEL], GIT

Aero flex TM500 test mobile, Keysight GnodeB simulator, Anritsu VSGand VSA, Azimuth Fader,Keysight VSG and MXG signal generators

LTE Rel-13\14 CATM Feature

Access Stratum – Layer1 (Design and development of Framework and Signal-Chain for Physical layer for LTE Technology

Automation framework Development and Validation for 4G and 5G PUSCH channel for the DU as well as the Keysight Signal Generator

Team management up to 5 Engineers

Timeline

Principle Engineer

Tejas Networks India PVT LTD
04.2024 - Current

SENIOR STAFF ENGINEER

Marvell Technologies
09.2022 - 03.2024

SENIOR TECH SPECIALIST

Tata Elxsi Ltd.
09.2019 - 08.2022

TECH SPECIALIST

Aricent Technologies
04.2016 - 07.2019

SENIOR TECH LEAD

HCL Technologies Ltd.
02.2013 - 03.2016

SENIOR TECH LEAD

Alcatel Lucent Technologies Ltd.
11.2012 - 01.2013

LEAD ENGINEER

Lekha Wireless
06.2012 - 10.2012

SENIOR SOFTWARE ENGINEER

Alcatel Lucent India Pvt. Ltd.
10.2010 - 05.2012

SENIOR SOFTWARE ENGINEER

Kyocera Wireless India Pvt. Ltd.
11.2007 - 09.2010

Master of Science - Embedded Systems

Manipal University
08.2006 - 01.2008

B.E. - Electronics and Communication

SJCIT College Chickballapur
09.2002 - 01.2006

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SANTOSH DNPrinciple Engineer