Sayan Banerjee

Responsibilities:

RTL design, constraint writing, & ensuring design quality through LINT,CDC,RDC and synthesis.

Support IP/SOC verification,SoC integration,Implementation , and functional validation teams.

Improvement of Synthesis flow methodology as council member

Notable Projects:

• Integration and owning resets of PCIE subsystem and analysing RDC violations for the SS .Also helped in developing mature sdc to be used by implementation team
• Integration ,adding registers, interrupts based on post Si case study of past devices and owning resets of PCIE+ENET SS and analyzing Lint,RDC violations for the same.Also helped in developing mature sdc to be used by implementation team
• Integration ,owning APB addressing and rate adaptor modules and analyzing Lint,CDC violation for the SS and developing mature sdc to be used by implementation team
• Integration ,owning APB addressing and rate adaptor module and analyzing CDC violation for the SS
• Worked as a support analyst for I2C IP contributed towards CDC and RDC analysis
• Worked on I3C protocol owning reset detector and exit detector modules