Shivani J

✅ SoC Verification – 7+ SoCs

• Created complete test environments and owned the RTL and GLS verification of MCAN, ADC, DAC, Memory controller, CRC, Interrupt controller and WADI(Waveform Analyzer and Diagnostic IP) IPs at SoC level
• Eliminated bugs in legacy designs, delivering high-quality silicon without post-silicon defects
• Pioneered CDC verification using JasperGold, adopted as the standard CDC methodology across the business unit
• Helped eliminate silicon issues entirely by applying assertion-based CDC methodology across SoC projects
• Mentored an intern and set up a Jenkins and vManager-based CI flow, automating regression tracking and reducing manual effort by 80%
• Designed a Palladium-based subsystem testbench that reduced long simulation regressions by over 95%
• Owned sub-blocks of the VGP(Video Subsystem Processing) subsystem; converted directed Specman-e tests to constrained-random SV tests
• Detected seven long-standing issues in legacy VGP logic through randomized regression and robust checking
• Mentored a team of 5 junior engineers (with less than 2 years of experience) in planning, testbench development, debugging, and design reviews, leading to the successful tape-out of the DMD device
• Automated the connectivity checks generation from specification which reduced the manual effort by 96%

✅ IP Verification – 3 IPs

• Verified Memory Controller IPs using UVM and Formal; delivered 100% code and functional coverage in closure
• Ensured high-quality handoff to SoC teams through exhaustive corner-case, random, and directed testing
• Integrated the ML model into the coverage closure process, increasing functional coverage by 8% (IEEE Publication)

✅ AMS Verification – 9 Analog IPs

• Owned AMS verification for analog IPs (ADC, DAC, Flash, PLL, Oscillator, Power Management Module) in multi-SoC projects
• Introduced assertion-based waveform validation, eliminating manual review, and improving verification depth
• Collaborated with EDA teams to optimize AMS simulation setups and reduce runtime across test benches
• Managed planning and tracking of AMS deliverables across multiple projects, leading a three-member verification team
• Created an AMS setup to verify interaction of multiple analog blocks for the first time in the business unit, which helped in identifying design issues early in the design cycle