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Design Verification Engineer skilled in ensuring the functionality, correctness, and reliability of complex digital designs. Expertise in creating and executing verification plans, developing test benches , and utilizing industry-standard verification methodologies such as UVM, System Verilog, and SV assertions. Proficient in simulation tools like Questa, with a strong understanding of digital design principles and protocols (e.g., AXI, AHB, APB). Knowledgeable in formal verification, functional verification.

Design Verification Engineer with knowledge in complex systems using System Verilog and UVM. Experience in Verilog, Python and UVM. Experienced in full design verification flow on both ASIC and FPGA. Experience in pre silicon and post silicon tests. Hardworking and passionate job seeker with strong organizational skills eager to secure entry-level position. Ready to help team achieve company goals.

Bachelor's degree in Electronics and Communication Engineering from Kocaeli University, currently pursuing a Master's degree at Gebze Technical University in Electronics Engineering. Specializing in embedded systems, microelectronics, and ASIC/FPGA design. Experienced in developing projects using STM32, ESP32, and FPGA boards. Proficient in image processing, machine learning, signal processing, and communication through Matlab/Simulink. Seeking new job opportunities in collaborative environments.

 Detail-oriented and results-driven ASIC Design and Verification Engineer with nearly two years of hands-on experience. Proven expertise in SystemVerilog, UVM, Python, C++, and EDA tools. Seeking a challenging role to apply technical skills in RTL design, Verification Methodologies, Software or Firmware application and collaborative problem-solving. 

SNEHA MANCHIKATLA

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Intern as an ASIC Design Verification Engineer

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B.Tech - Electronics And Communication Engineering

Intermediate - MPC

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